SEMICONDUCTOR DEVICE HAVING FIN-TYPE FIELD EFFECT TRANSISTORS

WIPO Patent Application WO/2005/022637

A1

A semiconductor device including n-type and p-type field effect transistors, wherein the crystal orientation of a protruding semiconductor region constituting the n-type field effect transistor satisfies such conditions that its surface parallel to the substrate is substantially a &lcub 100&rcub surface and its side surfaces are substantially &lcub 100&rcub surfaces orthogonal to the foregoing &lcub 100&rcub surface, and wherein the crystal orientation of a protruding semiconductor region constituting the p-type field effect transistor satisfies such conditions that its surface parallel to the substrate is substantially a &lcub 100&rcub surface and its side surfaces are substantially &lcub 110&rcub surfaces orthogonal to the foregoing &lcub 100&rcub surface.

TAKEUCHI KIYOSHI (JP)
WATANABE KOJI (JP)
TERASHIMA KOICHI (JP)
OGURA ATSUSHI (JP)
TATSUMI TORU (JP)
TAKEDA KOICHI (JP)
NOMURA MASAHIRO (JP)
TANAKA MASAYASU (JP)
YAMAGAMI SHIGEHARU (JP)
WAKABAYASHI HITOSHI (JP)

PCT/JP2004/012385

March 10, 2005

August 27, 2004

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NEC CORP (JP)
TAKEUCHI KIYOSHI (JP)
WATANABE KOJI (JP)
TERASHIMA KOICHI (JP)
OGURA ATSUSHI (JP)
TATSUMI TORU (JP)
TAKEDA KOICHI (JP)
NOMURA MASAHIRO (JP)
TANAKA MASAYASU (JP)
YAMAGAMI SHIGEHARU (JP)
WAKABAYASHI HITOSHI (JP)

H01L21/336; H01L21/8238; H01L27/092; H01L29/04; H01L29/786; (IPC1-7): H01L27/092

JP2003188273A	2003-07-04
JPS6380561A	1988-04-11
JP2003229575A	2003-08-15

Miyazaki, Teruo (16th Kowa Bldg. 9-20, Akasaka 1-chom, Minato-ku Tokyo 52, JP)

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