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Patent Searching and Data


Title:
SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD
Document Type and Number:
WIPO Patent Application WO/2023/163226
Kind Code:
A1
Abstract:
The present invention comprises: a semiconductor substrate which has a groove formed in one principal surface thereof; a plurality of fuse wires which are formed in the groove; metal wiring which is placed in a position at a distance from the groove and is exposed within the one principal surface; a first insulating film which covers the one principal surface and has a first opening through which the plurality of fuse wires are exposed and a second opening through which the metal wiring is exposed; a polymer insulating film in which a plurality of fuses are embedded in the groove in the first opening; a first metal part which covers the polymer insulating film; a second metal part which extends so as to cover the surface of the metal wiring exposed in the second opening and the surface of the first insulating film at the edges of the second opening; a second insulating film which forms a cover such that the first metal part is embedded on the polymer insulating film and the top surface of the second metal part is partially exposed; and a third metal part which reaches from the top surface of the second metal part exposed by the second insulating film to the top surface of the second insulating film.

Inventors:
YANO REIJI (JP)
ASHIKAGA KINYA (JP)
Application Number:
PCT/JP2023/007392
Publication Date:
August 31, 2023
Filing Date:
February 28, 2023
Export Citation:
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Assignee:
LAPIS SEMICONDUCTOR CO LTD (JP)
International Classes:
H01L21/3205; H01L21/768; H01L21/822; H01L23/522; H01L23/532; H01L27/04
Foreign References:
JP2007208190A2007-08-16
JP2007299939A2007-11-15
JP2011210938A2011-10-20
JP2013157468A2013-08-15
JP2011222963A2011-11-04
JP2004281966A2004-10-07
JP2004022579A2004-01-22
US20060017153A12006-01-26
Attorney, Agent or Firm:
FUJIMURA Motohiko (JP)
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