Title:
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THEREOF
Document Type and Number:
WIPO Patent Application WO/2011/089663
Kind Code:
A1
Abstract:
A first source drain region (114A) is formed external to a first insulating sidewall spacer (111A) upon a semiconductor substrate (100) as seen from a first gate electrode (106A) thereon. A second source drain region (114B) is formed external to a second insulating sidewall spacer (111B) upon the semiconductor substrate (100) as seen from a second gate electrode (106B) thereon. The second source drain region (114B) comprises a silicon mixed crystal layer (120). The height of the second gate electrode (106B) is lower than the height of the first gate electrode (106A).
Inventors:
FUJIMOTO HIROMASA
Application Number:
PCT/JP2010/004764
Publication Date:
July 28, 2011
Filing Date:
July 27, 2010
Export Citation:
Assignee:
PANASONIC CORP (JP)
FUJIMOTO HIROMASA
FUJIMOTO HIROMASA
International Classes:
H01L21/8238; H01L21/28; H01L21/336; H01L27/092; H01L29/78
Foreign References:
| JP2009117621A | 2009-05-28 | |||
| JP2009277961A | 2009-11-26 | |||
| JP2009038103A | 2009-02-19 | |||
| JP2008172209A | 2008-07-24 |
Attorney, Agent or Firm:
MAEDA, Hiroshi et al. (JP)
Hiroshi Maeda (JP)
Hiroshi Maeda (JP)
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