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Patent Searching and Data


Title:
SEMICONDUCTOR DEVICE AND PRODUCTION METHOD FOR SEMICONDUCTOR DEVICE
Document Type and Number:
WIPO Patent Application WO/2017/169447
Kind Code:
A1
Abstract:
This semiconductor device 100 comprises: a semiconductor base 110 having a second semiconductor layer 114 laminated upon a first semiconductor layer 112, having a trench 118 formed in the surface of the second semiconductor layer 114, and having a third semiconductor layer 116 comprising an epitaxial layer, formed inside the trench 118; a first electrode 126; an interlayer insulating film 122 having a prescribed opening 128; and a second electrode 124. Metal is filled inside the opening 128 and the opening 128 is positioned at a position away from the center of the third semiconductor layer 116. The second electrode 124 is connected to the third semiconductor layer 116 via the metal. The surface of the center section of the third semiconductor layer 116 is covered by the interlayer insulating film 122. As a result, a semiconductor device is provided that: comprises the semiconductor base 110 having the third semiconductor layer 116 that comprises the epitaxial layer and is formed inside the trench 118; and is unlikely to have reduction in voltage resistance resulting from breakdown in a reach-through mode.

Inventors:
KITADA MIZUE (JP)
ASADA TAKESHI (JP)
YAMAGUCHI TAKESHI (JP)
SUZUKI NORIAKI (JP)
ARAI DAISUKE (JP)
Application Number:
PCT/JP2017/007575
Publication Date:
October 05, 2017
Filing Date:
February 27, 2017
Export Citation:
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Assignee:
SHINDENGEN ELECTRIC MFG (JP)
International Classes:
H01L29/78; H01L29/41; H01L29/739; H01L29/861; H01L29/868; H01L29/872
Domestic Patent References:
WO2015151185A12015-10-08
Foreign References:
JP2007173734A2007-07-05
JP2010182881A2010-08-19
JP2006294853A2006-10-26
Attorney, Agent or Firm:
MATSUO, Nobutaka (JP)
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