Title:
SEMICONDUCTOR DEVICE
Document Type and Number:
WIPO Patent Application WO/2014/077154
Kind Code:
A1
Abstract:
[Problem] To match operating conditions during normal operations in which a bump electrode is used and operating conditions during test operations when a test pad is used. [Solution] A semiconductor device comprises a bump electrode (PLV0), a test pad (TPV), internal circuitry (31), power source wiring (V1) which connects the bump electrode (PLV0) and a node (N1), power source wiring (V2) which connects the test pad (TPV) and the node (N1), and power source wiring (V3) which connects the node (N1) and the internal circuitry (31). The power source wiring (V1) and the power source wiring (V2) are designed so that the resistance values are substantially equal to each other. Thus, because the operating conditions during normal operation and during test operations are substantially the same, the yield rate can be improved due to the elimination of mistaken determinations of non-defective products, or conversely, mistaken determinations of defective products.
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Inventors:
ONDA TAKAMITSU (JP)
Application Number:
PCT/JP2013/079871
Publication Date:
May 22, 2014
Filing Date:
November 05, 2013
Export Citation:
Assignee:
PS4 LUXCO SARL (LU)
ONDA TAKAMITSU (JP)
ONDA TAKAMITSU (JP)
International Classes:
G11C29/12; G11C5/00; G11C11/401; H01L21/3205; H01L21/66; H01L21/768; H01L21/822; H01L23/522; H01L25/065; H01L25/07; H01L25/18; H01L27/04; H01L27/10
Foreign References:
| JP2012078332A | 2012-04-19 |
Attorney, Agent or Firm:
WASHIZU Mitsuhiro et al. (JP)
Mitsuhiro Washizu (JP)
Mitsuhiro Washizu (JP)
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