Title:
SEMICONDUCTOR ELECTROSTATIC PROTECTION STRUCTURE
Document Type and Number:
WIPO Patent Application WO/2019/001518
Kind Code:
A1
Abstract:
A semiconductor electrostatic protection structure, comprising: a substrate (110); a first well (120), formed on the substrate (110); a second well (130), formed on the substrate (110) and disposed adjacent to the first well (120), wherein a first doped region (140) is provided in the first well (120), and a second doped region (150) and a third doped region (160) are provided in the second well (130), and a fourth doped region (170) is provided at a position where the first well (120) and the second well (130) are adjacent to each other; the first doped region (140), the fourth doped region (170), the second doped region (150), and the third doped region (160) are arranged in sequence, and adjacent doped regions of different doped types are isolated from each other, and a gate structure (180) is provided on the surface of a region between the two doped regions of the same doped type, wherein the doping types of the first well (120) and the second well (130) are different; the doping types of the first doped region (140) and the third doped region (160) are the same, and the doping types of the second doped region (150) and the fourth doped region (170) are different; and the first doped region (140) is drawn out separately.
Inventors:
SUN JUN (CN)
Application Number:
PCT/CN2018/093392
Publication Date:
January 03, 2019
Filing Date:
June 28, 2018
Export Citation:
Assignee:
CSMC TECHNOLOGIES FAB2 CO LTD (CN)
International Classes:
H01L27/02
Foreign References:
| CN106024896A | 2016-10-12 | |||
| CN205319155U | 2016-06-15 | |||
| CN105514166A | 2016-04-20 | |||
| JP2002124569A | 2002-04-26 |
Attorney, Agent or Firm:
ADVANCE CHINA IP LAW OFFICE (CN)
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