SEMICONDUCTOR INSPECTION DEVICE AND SEMICONDUCTOR INSPECTION METHOD USING THE SAME

WIPO Patent Application WO/2011/001635

A1

Provided are a semiconductor inspection device and a semiconductor inspection method such that in a specimen image in a single field of view obtained by an electron microscope, it is possible to suppress variations in the edge position measurement error attributable to the materials and structures of the lower layers of measured patterns by a first method, wherein the area in the field of view obtained by electron beam scanning is divided into a plurality of regions on the basis of information regarding the structures and materials of the object to be observed and the electron beam scanning conditions are changed for individual regions (805, 806), a second method, wherein, the image processing conditions are changed for individual regions resulting from division of the obtained images, or a third method, wherein the edge detection conditions are changed for individual regions resulting from the division within the edge inspection regions of the obtained images.

YAMAGUCHI ATSUKO (JP)
MOMONOI YOSHINORI (JP)
TANAKA JUNICHI (JP)
KAWADA HIROKI (JP)

PCT/JP2010/004183

January 06, 2011

June 23, 2010

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HITACHI HIGH TECH CORP (JP)
YAMAGUCHI ATSUKO (JP)
MOMONOI YOSHINORI (JP)
TANAKA JUNICHI (JP)
KAWADA HIROKI (JP)

G01B15/04; G01N23/225; H01L21/66

JP2002328015A	2002-11-15
JP2009016356A	2009-01-22
JP2001093950A	2001-04-06
JPS5999732A	1984-06-08
JPH10294345A	1998-11-04
JPH09320505A	1997-12-12

POLAIRE I. P. C. (JP)
Polaire Intellectual Property Corporation (JP)

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