Title:
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND MANUFACTURING METHOD THEREFOR
Document Type and Number:
WIPO Patent Application WO/2023/103443
Kind Code:
A1
Abstract:
Disclosed in the present application are a semiconductor integrated circuit device and a manufacturing method therefor. The structure used by the semiconductor integrated circuit device involves first electrodes being connected to resistive layers on side walls of the resistive layers, and being connected out from inner sides of the resistive layers by means of second electrodes, such that conductive filaments are formed on the side walls of the resistive layers after a voltage is applied. In this way, a resistive occurrence region can be reduced by means of reducing the height of a first electrode, such that an electric field is applied to resistive layers in a more centralized manner during an electrical operation process, thereby improving the uniformity of a device. In addition, resistive regions are located on side walls of the resistive layers, are formed by means of deposition, are not etched, and also have no damage caused by etching; moreover, the resistive regions being located on the side walls of the resistive layers can also prevent the problem of the resistive layers being uneven due to the recess of vias; thus, the performance of the resistive layers can be better, and the service life thereof can be longer.
Inventors:
ZHANG YAJUN (CN)
SHEN TINGYING (CN)
SHAN LIJUN (CN)
CHIU TAIWEI (CN)
LIU YU (CN)
KANG SZU-CHUN (CN)
SHEN TINGYING (CN)
SHAN LIJUN (CN)
CHIU TAIWEI (CN)
LIU YU (CN)
KANG SZU-CHUN (CN)
Application Number:
PCT/CN2022/113246
Publication Date:
June 15, 2023
Filing Date:
August 18, 2022
Export Citation:
Assignee:
XIAMEN INDUSTRIAL TECH RESEARCH INSTITUTE CO LTD (CN)
International Classes:
H01L45/00; H01L27/24
Foreign References:
| CN108123032A | 2018-06-05 | |||
| CN114220916A | 2022-03-22 |
Attorney, Agent or Firm:
BEIJING LEPATENT INTELLECTUAL PROPERTY AGENCY (GENERAL PARTNERSHIP) (CN)
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