Title:
SEMICONDUCTOR MEMORY DEVICE
Document Type and Number:
WIPO Patent Application WO/2020/031265
Kind Code:
A1
Abstract:
The semiconductor memory device according to an embodiment of the present invention includes a plurality of memory cell array layers each of which has a first surface and a second surface opposite the first surface and does not include a substrate, said memory cell array layers each including a plurality of memory cells three-dimensionally arranged in a memory cell array region and a surface wiring layer that is embedded in the first surface and/or the second surface. The surface wiring layers of the memory cell array layers are provided so as to overlap one another when viewed in a direction perpendicular to the first surface, and the plurality of memory cell array layers are stacked by the surface wiring layers being connected to each other.
Inventors:
HIGASHI KAZUYUKI
TSUMURA KAZUMICHI
KATSUMATA RYOTA
ARAI FUMITAKA
TSUMURA KAZUMICHI
KATSUMATA RYOTA
ARAI FUMITAKA
Application Number:
PCT/JP2018/029627
Publication Date:
February 13, 2020
Filing Date:
August 07, 2018
Export Citation:
Assignee:
KIOXIA CORP (JP)
International Classes:
H01L27/11575
Foreign References:
| JP2011204829A | 2011-10-13 | |||
| JP2015225868A | 2015-12-14 | |||
| JP2016062901A | 2016-04-25 | |||
| JP2013077767A | 2013-04-25 |
Attorney, Agent or Firm:
INOUE, Masanori (JP)
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