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Patent Searching and Data


Title:
SEMICONDUCTOR PACKAGE AND METHOD FOR MANUFACTURING SAME
Document Type and Number:
WIPO Patent Application WO/2013/100709
Kind Code:
A1
Abstract:
The present invention provides a semiconductor package having a fan-out structure in which a semiconductor chip is embedded in semiconductor chips by a sealing member and an outer connection member is placed below the embedded semiconductor chip. A semiconductor package according to one embodiment of the present invention comprises: an embedding redistribution pattern layer; an upper semiconductor chip arranged on the embedding redistribution pattern layer; an upper sealing member for sealing the upper semiconductor chip; a lower semiconductor chip arranged beneath the embedding redistribution pattern layer; and a lower sealing member for sealing the lower semiconductor chip so that the lower semiconductor chip is not exposed.

Inventors:
PARK YUN MOOK (KR)
JEON BYOUNG YOOL (KR)
Application Number:
PCT/KR2012/011767
Publication Date:
July 04, 2013
Filing Date:
December 28, 2012
Export Citation:
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Assignee:
NEPES CO LTD (KR)
International Classes:
H01L23/28; H01L23/12; H01L23/48
Foreign References:
KR20110048733A2011-05-12
KR20090036948A2009-04-15
US20090166846A12009-07-02
KR100900240B12009-06-02
JP2003031768A2003-01-31
Attorney, Agent or Firm:
SELIM INTELLECTUAL PROPERTY LAW FIRM (KR)
특허법인 세림 (KR)
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Claims: