Title:
SEMICONDUCTOR PACKAGE, METHOD FOR MANUFACTURING THE SAME, AND SEMICONDUCTOR DEVICE
Document Type and Number:
WIPO Patent Application WO/2021/049578
Kind Code:
A1
Abstract:
Disclosed is a method for manufacturing a semiconductor package, the method including: a step for forming a chip mounting part having a lower interposer and a semiconductor chip; a step for forming a sealed structure comprising the chip mounting part, an upper substrate, and a sealing layer, the sealing layer filling in the space between the chip mounting part and the upper substrate and sealing the semiconductor chip; a step for forming via holes penetrating through the upper substrate and the sealing layer to reach wiring of the lower interposer; and a step for forming electroconductive posts connected to the wiring of the lower interposer by filling in the via holes.
Inventors:
TAKEKOSHI MASAAKI (JP)
NONAKA TOSHIHISA (JP)
SUZUKI NAOYA (JP)
SHIMADA KENJI (JP)
NONAKA TOSHIHISA (JP)
SUZUKI NAOYA (JP)
SHIMADA KENJI (JP)
Application Number:
PCT/JP2020/034336
Publication Date:
March 18, 2021
Filing Date:
September 10, 2020
Export Citation:
Assignee:
SHOWA DENKO MATERIALS CO LTD (JP)
International Classes:
H01L23/12; H01L23/29; H01L23/31; H01L25/065; H01L25/07; H01L25/18
Domestic Patent References:
| WO2012133839A1 | 2012-10-04 |
Foreign References:
| US20100289133A1 | 2010-11-18 | |||
| JP2009088150A | 2009-04-23 | |||
| JP2010123632A | 2010-06-03 | |||
| JP2007053327A | 2007-03-01 | |||
| US20130241080A1 | 2013-09-19 |
Attorney, Agent or Firm:
HASEGAWA Yoshiki et al. (JP)
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