Title:
SEMICONDUCTOR STRUCTURE AND METHOD FOR PREPARING SAME
Document Type and Number:
WIPO Patent Application WO/2023/097907
Kind Code:
A1
Abstract:
The present disclosure relates to the technical field of semiconductors, and provides a semiconductor structure and a method for preparing same. The method for preparing a semiconductor structure comprises: providing a substrate that has an array area, wherein the array area comprises a first region and a second region which are arranged adjacent to each other; and using the same preparation process to form a first memory in the first region and form a second memory in the second region, wherein the preparation process is a process for preparing the first memory. In the present disclosure, a first memory and a second memory are formed on a substrate at the same time by means of the same preparation process, so that the same semiconductor structure has two memories with different forms, and, by means of such an arrangement, the performance of the semiconductor structure can be improved while simplifying the steps for preparing the semiconductor structure.
Inventors:
WANG XIAOGUANG (CN)
LI HUIHUI (CN)
CHANG WEI (CN)
CAO KANYU (CN)
LI HUIHUI (CN)
CHANG WEI (CN)
CAO KANYU (CN)
Application Number:
PCT/CN2022/078086
Publication Date:
June 08, 2023
Filing Date:
February 25, 2022
Export Citation:
Assignee:
CHANGXIN MEMORY TECH INC (CN)
BEIJING SUPERSTRING ACADEMY OF MEMORY TECH (CN)
BEIJING SUPERSTRING ACADEMY OF MEMORY TECH (CN)
International Classes:
H01L27/108; H01L27/22; H01L21/8242; H01L43/08
Foreign References:
| CN108133936A | 2018-06-08 | |||
| CN103579174A | 2014-02-12 | |||
| CN109285831A | 2019-01-29 | |||
| US5702988A | 1997-12-30 | |||
| US20170200723A1 | 2017-07-13 | |||
| US10043854B1 | 2018-08-07 | |||
| US20150092472A1 | 2015-04-02 |
Attorney, Agent or Firm:
LEADER PATENT & TRADEMARK FIRM (CN)
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