Title:
SEMICONDUCTOR STRUCTURE AND PREPARATION METHOD THEREFOR
Document Type and Number:
WIPO Patent Application WO/2023/035528
Kind Code:
A1
Abstract:
The present application relates to a semiconductor structure and a preparation method therefor. The reparation method for a semiconductor structure comprises: providing a substrate, and forming a shallow trench isolation structure on the substrate; forming a plurality of transistor accommodating slots in active areas, an interval being formed between the transistor accommodating slots and the shallow trench isolation structure; forming columnar structures in the transistor accommodating slots, each columnar structure comprising a source, a conductive channel, and a drain sequentially arranged along a direction distant from the substrate; etching to remove the active area located in the interval and the active area located between the adjacent columnar structures in a same active area to form a bit line trench, the bit line trench surrounding the source; and forming a bit line around and in contact with the source in the bit line trench.
Inventors:
GUO SHUAI (CN)
Application Number:
PCT/CN2022/071594
Publication Date:
March 16, 2023
Filing Date:
January 12, 2022
Export Citation:
Assignee:
CHANGXIN MEMORY TECH INC (CN)
International Classes:
H01L21/8242
Foreign References:
| US20190198571A1 | 2019-06-27 | |||
| US20200006572A1 | 2020-01-02 | |||
| CN102097412A | 2011-06-15 | |||
| CN101044615A | 2007-09-26 | |||
| CN102544049A | 2012-07-04 | |||
| US20200044069A1 | 2020-02-06 |
Attorney, Agent or Firm:
ADVANCE CHINA IP LAW OFFICE (CN)
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