Title:
SIGNAL DETECTION SYSTEM AND MEMORY DETECTION METHOD
Document Type and Number:
WIPO Patent Application WO/2023/206659
Kind Code:
A1
Abstract:
The present disclosure relates to the field of semiconductor circuit design, in particular to a signal detection system and a memory detection method. The signal detection system comprises a signal generator (100), which generates a reference test signal on the basis of external parameters, the reference test signal being a clock signal that satisfies a preset duty cycle, which performs a duty cycle test on the reference test signal on the basis of a test circuit (400), so as to determine whether the function of the test circuit (400) is normal, which sequentially selects different test modules on the basis of a test control signal if the function of the test circuit (400) is normal, and which performs, on the basis of the test circuit (400), duty cycle tests on signals outputted by the selected test modules. The test module comprises: a signal conversion module (1002) and a write clock path (1003). Different test paths are selected, so as to test whether duty cycles of a high-speed clock signal in different transmission paths meet requirements, thereby ensuring the stability of data processing of a memory.
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Inventors:
QIN JIANYONG (CN)
LI JIANNI (CN)
LIU ZHONGLAI (CN)
LI JIANNI (CN)
LIU ZHONGLAI (CN)
Application Number:
PCT/CN2022/093714
Publication Date:
November 02, 2023
Filing Date:
May 19, 2022
Export Citation:
Assignee:
CHANGXIN MEMORY TECH INC (CN)
International Classes:
G01R29/02
Foreign References:
| US20080005606A1 | 2008-01-03 | |||
| CN111863048A | 2020-10-30 | |||
| CN209087409U | 2019-07-09 | |||
| CN109274356A | 2019-01-25 | |||
| US20050094448A1 | 2005-05-05 |
Attorney, Agent or Firm:
SHANGHAI CHENHAO INTELLECTUAL PROPERTY LAW FIRM GENERAL PARTNERSHIP (CN)
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