SILICON CARBIDE SEMICONDUCTOR DEVICE

WIPO Patent Application WO/2016/132987

A1

This silicon carbide semiconductor device (1) is provided with a silicon carbide substrate (10) and a gate insulating film (15). The silicon carbide substrate (10) has a first main surface (10a) and a second main surface (10b) that is on the reverse side of the first main surface (10a). The gate insulating film (15) is formed on the first main surface (10a). The silicon carbide substrate (10) comprises a first body region (13a) that has a p-type conductivity, a second body region (13b) that has a p-type conductivity, and a JFET region (2) that has an n-type conductivity and is arranged so as to be sandwiched between the first body region (13a) and the second body region (13b). The JFET region (2) comprises both a first impurity that is capable of imparting the region with a p-type conductivity and a second impurity that is capable of imparting the region with an n-type conductivity. The concentration of the second impurity is higher than the concentration of the first impurity. Consequently, the present invention provides a silicon carbide semiconductor device (1) wherein dielectric breakdown of a gate insulating layer (15) is able to be suppressed.

UCHIDA KOSUKE (JP)
HIYOSHI TORU (JP)
WADA KEIJI (JP)

PCT/JP2016/053946

August 25, 2016

February 10, 2016

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SUMITOMO ELECTRIC INDUSTRIES (JP)

H01L29/78; H01L29/12; H01L29/739

WO2004036655A1	2004-04-29
WO2010021146A1	2010-02-25

JP2009182271A	2009-08-13
JP2014187112A	2014-10-02
JP2014183274A	2014-09-29
JP2012104648A	2012-05-31
JP2002280554A	2002-09-27

Fukami Patent Office, p. c. (JP)
Patent business corporation Fukami patent firm (JP)

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