BACKGROUND OF THE INVENTION The present invention relates to polyurethane polishing pads and methods of producing the same. The present invention generally relates to polishing pads, and in particular to chemical-mechanical polishing (CMP) pads. CMP is a process step in the semiconductor fabrication sequence that has generally become an integral part of the manufacture of semiconductor wafers. The process is used in a variety of applications in the semiconductor fabrication sequence. Different applications are sometimes best optimized with different polishing pad types and configurations, however, this invention is not application specific. In any of these CMP processes, a silicon substrate is forcibly placed in direct contact with a moving polishing pad. A wafer carrier applies pressure against the backside of the substrate, usually while simultaneously forcibly applying rotation. During this process a slurry is provided, and is generally carried between the wafer and the pad by the motion of the pad. The composition of the slurry varies depending on the specific application. A CMP polishing pad performs various mechanical functions. For example, it may polish, planarize up to a certain planarization length ("L") determined by the quality of the silicon substrate, not planarize beyond that length, transport slurry, maintain friction with numerous sequentially polished wafers, clean the wafer surface, or may not scratch the wafer surface. The present invention addresses the planarization length of a CMP pad. L is defined as a lateral dimension characteristic of the pad's ability to planarize a substrate. Intrinsic to this concept is Preston's equation, which maintains that when polishing, the removal rate is proportional to force. There are significant deviations to this relationship, but it holds generally, and for our purpose, it is sufficient. With Preston in mind, Fig. 1 illustrates an exemplary upraised surface feature to be planarized. A polishing pad will effectively planarize the upraised feature when the pressure exerted by the pad at the top of the feature exceeds the pressure exerted adjacent to the feature. According to Preston's equation, the removal rate at the top of the feature will exceed the removal rate adjacent to the feature and over time the feature will decrease in height. One definition of planarization length is the distance from the feature that the pressure has increased to 1/e (e is In(IO)) of the pressure infinitely far from the feature. Practitioners will appreciate that other definitions of L may be used within the scope of the present invention. The silicon wafer and the platen may have distinct planarity characteristics. For example, silicon wafers generally exhibit small but nonzero undulations in their thickness. These undulations are on the order of 300A and are spaced apart by a distance on the order of one centimeter. These undulations are often unrelated to the surface features of the wafer and planarization may lead to uneven removal of material from the wafer surface. Fig. 2 illustrates an exemplary silicon wafer where the different shading represents uneven removal of wafer material resulting from a Flexural Modulus that was too high during planarization. Additionally, it is desirable to prevent transfer of any deviations or irregularities present in the platen onto the wafer. This may be accomplished by increasing L up to substantially less than 1cm. This control of L is typically achieved by use of a stacked pad, where the top pad does the polishing and the planarizing, and the bottom pad serves to decouple or isolate the platen from the top pad. Suitable flexure between the top and bottom pads adequately minimizes pressure differences due to topography variations on the order of 300A over a distance of 1cm. Additional descriptions of stacked pads are found in U.S. Patents #5,257,478 by Hyde, #5,212,910 by Breivogel, #5,287,663 by Pierce and #6,362,107 by Shiro. A typical bottom pad in such configurations is the Suba IV available from Rodel. Such pads are resilient or elastic and suitably decouple the platen from the top pad. As suggested by Patent # 5,257,478 by Hyde, et al., an ideal value for this bottom pad is <250 psi. It has been traditionally thought that the bottom layer must be extremely soft, as described in Hyde above, causing practitioner to configure bottom layers of soft foamy materials that may absorb water and cause a nonuniform modulus of elasticity. A suitable bottom pad remains elastic throughout its usable life, and preferably uniformly elastic within the wafer track. For example, since water is a natural component of most CMP processes, the flexural modulus of both the top and bottom pad is preferably independent of the presence of water. Additionally, since the CMP process involves the use of pressure, suitable pads should not exhibit a significantly inelastic component. Under pressure, an inelastic material will undergo permanent deformation. If either the subpad or the top pad undergo significant permanent deformation, a degradation of the performance of the pad could result. Two of the various causes of this degradation include: 1) a permanent deformation may adversely affect the elastic modulus of the material; and 2) a nonuniform change in the elastic modulus can change the uniformity of material removal on a wafer. Therefore it is preferable that a pad exhibit primarily elastic behavior. Accordingly, there is a need for multi-layer polyurethane CMP pad providing uniform planarization of a silicon substrate through selection of the relative mechanical properties of a bottom decoupling pad and a top planarizing pad.

SUMMARY OF THE INVENTION In general the present invention provides an improved multi-layer polyurethane polishing pad. Various exemplary embodiments provide a bottom pad or layer having a first flexural modulus and a top pad or layer having a second flexural modulus, and wherein the bottom layer exhibits primarily elastic behavior. In one embodiment, a polishing pad includes a bottom layer and a top layer attached to said bottom layer, wherein the bottom layer has a modulus of elasticity between 300 psi and 5,000 psi and a compressibility less than 30% at 73 psi, (less than 4.1 % at 10 psi assuming linearity) while the top layer, which contains a polishing surface, has a greater modulus of elasticity and a lower compressibility than the bottom layer. In accordance with another embodiment of the present invention, the top layer has a modulus of elasticity between 5,000 and 160,000 psi and a compressibility less than 12% at 73 psi. These ranges of mechanical properties have proven advantageous in producing a uniform material removal rate, and in particular a uniform removal rate of a material of a semiconductor wafer while planarizing the wafer substrate. BRIEF DESCRIPTION OF THE DRAWINGS A more complete understanding of the present invention may be derived by referring to the detailed description and claims when considered in connection with the Figures, wherein Fig. 1 is a view showing a pressure applied by a polishing pad to an upraised feature on a semiconductor wafer; Fig. 2 is a view showing a post-polish wafer thickness map of a pad which exhibited in total a Flexural Modulus which was too high; and Fig. 3 is a schematic view of the stacked pad in which a bottom pad isolates a top pad from a platen.

DETAILED DESCRIPTION The description that follows is not intended to limit the scope, applicability or configuration of the invention in any way; rather, it is intended to provide a convenient illustration for implementing various embodiments of the invention. As will become apparent, various changes may be made in the function and arrangement of the elements described in these embodiments without departing from the scope of the invention. It should be appreciated that the description herein may be adapted to be employed with alternatively configured pads having different shapes, components, and the like and still fall within the scope of the present invention. Thus, the detailed description herein is presented for purposes of illustration only and not of limitation. With reference now to Fig. 3, an exemplary polyurethane pad 1 in accordance with the present invention includes a bottom layer 2 associated with a platen and a top layer 3 attached to bottom layer 2. A polishing surface 4 is provided on the face of top layer 3. Bottom layer 2 is configured to associate top layer 3 with a platen while isolating or decoupling top layer 3 from any irregularities of the platen. It is understood that the pads of this invention can be used in any number of processes on any number of substrates, such as, for example, a bare silicon wafer, a semiconductor device wafer, a magnetic memory disk, and the like. Layers 2 and 3 may be made from any cell foam urethanes, polyurethane, acrylic, nylon, polyester, polyether, polyester polyurethane, polycarbonate, or polymers of the same. The various layers of the present invention can be made by any one of a number of polymer processing methods, such as but not limited to, casting, compression, injection molding, extruding, web-coating, extruding, and sintering. The pad layers may be single phase or multiphase, where the second phase could include polymeric microballoons, gases or fluids. A second phase may also include an abrasive such as silica, alumina, calcium carbonate, ceria, titania, germanium, diamond, silicon carbide or combinations thereof. Layers 2 and 3 may include filler materials and may be configured to have a desired topography. In accordance with one embodiment of the present invention, bottom layer 2 has a modulus of elasticity between 300 psi and 5000 psi and a preferred range of 1500 psi to 3500 psi. The compressibility of bottom layer 2 is less than 30% at 73 psi with a preferred range of 5% to 15% at 73 psi. Top layer 3 has a Modulus of Elasticity that is greater than the Modulus of Elasticity of bottom layer 2, and at the same time has a compressibility that is less than the compressibility of bottom layer 2. In accordance with another embodiment, top layer 3 has a modulus of elasticity between 5,000 psi and 160,000 psi with a preferred range of 40,000 psi to 100,000 psi and a compressibility of less than 12% at 73 psi, with a preferred range Of 4% to 10% at 73 psi. It has been found that a multi-layer polyurethane polishing pad having a lesser-modulus bottom layer and a higher-modulus top layer, and simultaneously having a more compressible bottom layer and the less compressible top layer, within the parameter ranges described, provides a uniform rate of material removal, an absence of nanotopography, and uniform planarization of the wafer surface. It is also desirable that materials are selected to provide uniform modulus of elasticity regardless of the presence of water during polishing. It will be understood that each of the elements described above, or two or more together, may also find a use in other applications and in other types of constructions differing from the types described above. While the invention has been illustrated and described as embodied in a polyurethane polishing pad and method of producing the same, it is not intended to be limited to the details shown. Various modifications and structural changes and changes in the selection, design, and arrangement of the various components and steps discussed herein may be made without departing from the scope of the invention. For example, the various components may be implemented in alternate ways. These alternatives can be suitably selected depending upon the particular application or in consideration of any number of factors associated with the operation of the system. In addition, the techniques described herein may be extended or modified for use with other types of devices. These and other changes or modifications are intended to be included within the scope of the present invention.