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Patent Searching and Data


Title:
STRUCTURE AND METHOD FOR FORMING CAPACITORS FOR THREE-DIMENSIONAL NAND
Document Type and Number:
WIPO Patent Application WO/2021/003635
Kind Code:
A1
Abstract:
A 3D capacitor (1195) for a 3D memory device (100) and a fabrication method which includes forming, on a first side (430-1) of a first substrate (430), a peripheral circuitry (400) having a plurality of peripheral devices (450), a first interconnect layer (462), a deep well (455) and a first capacitor electrode (473). The method also includes forming, on a second substrate (530), a 3D memory array (500) having a plurality of memory cells (340) and a second interconnect layer (562), and bonding the first interconnect layer (462) of the peripheral circuitry (400) with the second interconnect layer (562) of the 3D memory array (500). The method further includes forming, on a second side (430-2) of the first substrate (430), one or more trenches (994) inside the deep well (455), disposing a capacitor dielectric layer (1096) on sidewalls of the one or more trenches (994), and forming capacitor contacts (1198) on sidewalls of the capacitor dielectric layer (1096) inside the one or more trenches (994).

Inventors:
CHEN LIANG (CN)
GAN CHENG (CN)
LIU WEI (CN)
CHEN SHUNFU (CN)
Application Number:
PCT/CN2019/095069
Publication Date:
January 14, 2021
Filing Date:
July 08, 2019
Export Citation:
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Assignee:
YANGTZE MEMORY TECH CO LTD (CN)
International Classes:
H01L23/522; H01L27/1157; H01L27/11573; H01L49/02
Foreign References:
CN109461737A2019-03-12
CN109155320A2019-01-04
CN109256392A2019-01-22
US20150349121A12015-12-03
Attorney, Agent or Firm:
NTD UNIVATION INTELLECTUAL PROPERTY AGENCY LTD. (CN)
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