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Title:
SYNCHRONIZATION SIGNAL BLOCK AND REMAINING MINIMUM SYSTEM INFORMATION LOCATION REPORTING IN NR MEASUREMENT
Document Type and Number:
WIPO Patent Application WO/2020/014876
Kind Code:
A1
Abstract:
In accordance with some embodiments, an apparatus comprises at least one processor and at least one memory including computer program code. The at least one memory and the computer program code are configured to, with the at least one processor, cause the apparatus to receive configuration of at least one measurement type from a network entity. The apparatus may further detect at least one synchronization signal block. The apparatus may further read at least one physical broadcast channel. The apparatus may further transmit one or more of at least one synchronization signal timing location and at least one remaining minimum system information (RMSI) timing location associated with at least one cell timing.

Inventors:
ZHANG LI (CN)
HE JING (CN)
DECARREAU GUILLAUME (DE)
KOZIOL DAWID (PL)
DALSGAARD LARS (FI)
Application Number:
PCT/CN2018/096014
Publication Date:
January 23, 2020
Filing Date:
July 17, 2018
Export Citation:
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Assignee:
NOKIA SHANGHAI BELL CO LTD (CN)
NOKIA SOLUTIONS & NETWORKS OY (FI)
International Classes:
H04W74/00
Domestic Patent References:
WO2018106043A12018-06-14
WO2018129319A12018-07-12
Foreign References:
US20180167946A12018-06-14
Other References:
VIVO: "R2-1807626: Report of Email Discussion [101bis#47][NR] ANR", 3GPP TSG-RAN WG2 MEETING #102, 25 May 2018 (2018-05-25)
Attorney, Agent or Firm:
KING & WOOD MALLESONS (CN)
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