Title:
TERMINAL CIRCUIT AND SEMICONDUCTOR CIRCUIT
Document Type and Number:
WIPO Patent Application WO/2023/135922
Kind Code:
A1
Abstract:
A terminal circuit according to an embodiment of the present disclosure comprises: a first circuit which is provided in a first path connecting a first signal terminal and a first power node and which can cause the first path to be enabled; a second circuit which is provided in a second path connecting a first signal terminal and a second power node and which can cause the second path to be enabled; and a control circuit capable of performing a first operation which includes control of the operation of the first circuit so as to cause the first path to be enabled during a first period corresponding the rising edge of a first input signal at the first signal terminal and includes control of the operation of the second circuit so as to cause the second path to be enabled during a second period corresponding to the falling edge of the first input signal.
Inventors:
TANAKA YOSHINORI (JP)
SAEKI TAKANORI (JP)
SAEKI TAKANORI (JP)
Application Number:
PCT/JP2022/042361
Publication Date:
July 20, 2023
Filing Date:
November 15, 2022
Export Citation:
Assignee:
SONY SEMICONDUCTOR SOLUTIONS CORP (JP)
International Classes:
H03K19/0175; H03K19/0944
Foreign References:
| US6686763B1 | 2004-02-03 | |||
| JPH05276070A | 1993-10-22 | |||
| JP2004096351A | 2004-03-25 | |||
| JP2000261508A | 2000-09-22 | |||
| JP2000059444A | 2000-02-25 |
Attorney, Agent or Firm:
TSUBASA PATENT PROFESSIONAL CORPORATION (JP)
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