Title:
TEST ELECTRONICS TO DEVICE UNDER TEST INTERFACES, AND METHODS AND APPARATUS USING SAME
Document Type and Number:
WIPO Patent Application WO/2010/062967
Kind Code:
A3
Abstract:
In one embodiment, a test system has a set of test electronics for testing a device under test (DUT). The test system also has at least one test electronics to DUT interface having a zero insertion force (ZIF) connector. Each ZIF connector has a ZIF connector to DUT clamping mechanism configured to i) apply a first orthogonal force to a probe card that interfaces with a DUT, by pressing the ZIF connector against the probe card, and simultaneously ii) exert at least one second orthogonal force on the probe card, the at least one second orthogonal force being opposite in direction to the first orthogonal force.
Inventors:
GROVER SANJEEV (US)
CHIU DONALD W (US)
ANDBERG JOHN W (US)
CHIU DONALD W (US)
ANDBERG JOHN W (US)
Application Number:
PCT/US2009/065947
Publication Date:
August 26, 2010
Filing Date:
November 25, 2009
Export Citation:
Assignee:
VERIGY PTE LTD SINGAPORE (SG)
GROVER SANJEEV (US)
CHIU DONALD W (US)
ANDBERG JOHN W (US)
GROVER SANJEEV (US)
CHIU DONALD W (US)
ANDBERG JOHN W (US)
International Classes:
H01L21/66; G01R31/26
Foreign References:
| US20070126439A1 | 2007-06-07 | |||
| US7057410B1 | 2006-06-06 | |||
| US6348789B1 | 2002-02-19 |
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