The present invention relates to the field of temperature control, and specifically to temperature control using thermoelectric coolers (TECs).

The invention has been developed primarily for application in the thermal management of optical integrated circuits, and will be described hereinafter with reference to that application. However, it will be appreciated that the invention can also be applied to other situations in which TECs are used.

A thermoelectric cooler, or Peltier, is a device that creates a temperature differential between two surfaces thereof when a voltage is applied across it.

A particular application for TECs is in thermal management of optical integrated circuits. For example, TECs can be used to maintain thermally- sensitive optical elements such as diffraction grating-based demultiplexers at their intended operating temperature, and can also be used to cool circuits including one or more elements that generate significant amounts of heat, such as those including a pin diode Variable Optical Attenuator (VOA) as described in US Patent No. s 5908305 and 5757986.

The TEC is typically used in conjunction with a temperature sensing element, such as a thermistor, that monitors the temperature of the integrated circuit to which the TEC is thermally coupled. Where, for example, the TEC is used for cooling, the TEC is controlled to draw heat away from the silicon into a suitable heatsink if the temperature of the circuit is too high. The TEC is typically controlled by way of a pulse-width modulated (PWM) signal driven by high-current drive circuitry, which is in turn controlled by a proportional integral differential (PID) controller. The PID controller can either be in software form or implemented by means of electronic components.

A TEC can be damaged or destroyed if it is operated when incorrectly thermally coupled to the heatsink and/or the device whose temperature is to be controlled. This is typically due to the temperature in the TEC rising to the point where solder becomes molten, resulting in irreparable damage to the TEC. Similarly, the TEC can be destroyed or damaged within seconds if it is accidentally powered up during assembly or testing and is driven with a high enough current.

The potential for damage to the TEC can be of particular concern when using the TEC to bring an integrated circuit (or other device) including a thermally- sensitive element from the start-up temperature to the desired operating temperature. Conventionally, the TEC is driven relatively conservatively so as to avoid damaging the TEC even if it happens that the thermal coupling between it and the device and/or the heat sink is somewhat deficient as a result of variations in the assembly process. However, this can be disadvantageous in terms of the time required to reach the operating temperature for individual TECs whose thermal coupling is good enough to allow them to be driven harder without damaging them.

It is an object of the present invention to overcome, or at least ameliorate, one or more of the problems of the prior art.

According to a first aspect of the present invention, there is provided a method of heating or cooling a device using a thermoelectric cooler (TEC), the method including monitoring the temperature differential within the TEC, and, if the monitored temperature differential within the TEC exceeds a predetermined range, curbing the TEC drive to an extent sufficient to maintain the monitored temperature differential within said TEC within said predetermined range.

According to another aspect of the present invention, there is provided a thermoelectric cooler and associated control circuitry for heating or cooling a device, wherein the control circuitry is configured for, in use, monitoring the temperature differential within the TEC, and, if the monitored temperature

differential within the TEC exceeds a predetermined range, curbing the TEC drive to an extent sufficient to maintain the monitored temperature differential within said TEC within said predetermined range.

Curbing the TEC drive may, for example, involve reducing the TEC drive voltage/current, or switching off the TEC drive voltage/current Controlling the TEC drive such that the temperature differential within the TEC is maintained within a predetermined range irrespective of the absolute temperature of the subject device (i. e. even where a greater temperature differential would be preferable for better controlling the temperature of the subject device) allows the subject device to be temperature-controlled as well as possible without damaging the TEC.

In one embodiment, the temperature differential within the TEC is monitored by measuring a voltage generated within the TEC due to the temperature differential within the TEC, a control signal is generated based on the voltage, and the TEC is driven based on the control signal. In one embodiment, the control signal is a pulse-width modulated signal, wherein a relatively high duty cycle control signal causes correspondingly greater cooling (or correspondingly greater heating, depending on the direction of current through the TEC). In one embodiment, the control signal is generated by a microprocessor, and the microprocessor controls operation of the TEC such that the TEC is rendered inoperative (i. e. the drive voltage is removed from across the TEC) when measuring the voltage generated within the TEC due to the temperature differential within the TEC. In a typical application, the control signal is generated by means of a proportional integral differential control loop.

In one embodiment, the control circuitry includes a microprocessor, but nevertheless also includes circuitry (hardware) external to the microprocessor that functions to curb the TEC drive if the temperature differential within the TEC is excessive even in the event of a microprocessor failure.

The TEC and associated control circuitry may be unipolarly configured for either cooling only (for example for cooling a thermally sensitive device from a relatively high start-up (ambient) temperature to a relatively low operating temperature and keeping it there), or for heating only (for example, for heating a thermally-sensitive device from a relatively low start-up temperature to a relatively high start-up temperature and keeping it there. In a preferred embodiment, the TEC and associated control circuitry is configured for bipolar configuration such that it can be used, for example, in both relatively high temperature start-up conditions and relatively low start-up temperature conditions. Such bipolar configuration also facilitates the operation of maintaining the integrated circuit (or other device) at the operating temperature..

In one embodiment, the device to be temperature controlled is an optic chip defining an integrated optical circuit, and the TEC is directly bonded to the optic chip.

According to another aspect of the present invention, there is provided a method of controlling the temperature of a device using a thermoelectric cooler (TEC), the method comprising the steps of: monitoring the temperature differential within the TEC, and monitoring the temperature of the device; and driving the TEC based on the monitored temperature differential within the TEC and the monitored temperature of the device so as to control the temperature of the device whilst avoiding an excessive temperature differential within the TEC.

According to another aspect of the present invention, there is provided a thermoelectric cooler (TEC) and associated control circuitry for controlling the temperature of a device, the control circuitry being configured to monitor the temperature differential within the TEC and the temperature of the device, and drive the TEC based on the monitored temperature differential within the TEC and the monitored temperature of the device so as to control the temperature

of the device whilst avoiding an excessive temperature differential within the TEC.

A preferred embodiment of the invention will now be described, by way of example only, with reference to the accompanying drawings, in which : Figure 1 is a block diagram showing apparatus for controlling a thermoelectric cooler (TEC), in accordance with an embodiment of the invention; Figure 2 is an example of a layout for the internal structure of a dedicated integrated circuit for interfacing to a TEC in a technique according to an embodiment of the invention; Figure 3 is a circuit diagram simulating apparatus for controlling a TEC, in accordance with an embodiment of the invention; Figure 4 shows the inputs and outputs of the apparatus of Figure 3; Figure 5 is a schematic view of a model of a semiconductor device utilising the Peltier and Seebeck effects, in accordance with an embodiment of the invention; and Figure 6 is a flowchart showing a method of controlling a TEC, in accordance with an embodiment of the invention.

DETAILED DESCRIPTION OF PREFERRED EMBODIMENT The following detailed description relates to the use of a technique according to an embodiment of the present invention for controlling the temperature of an integrated optics circuit including a thermally-sensitive element (i. e. an element whose performance is critically dependent on the temperature at which it is operated, such as demultiplexers based on AWG diffraction gratings), where the technique is particularly useful for protecting the TEC

when bringing the integrated optics circuit up or down from a starting temperature to the intended operating temperature. The present invention is not limited to such use. It is, for example, also useful for heating or cooling other kinds of thermally-sensitive devices where there is a desire to bring the device to the intended operating temperature as quickly as possible without damaging the TEC.

Figure 1 shows a thermoelectric cooler (TEC) 10 thermally coupled on one side with a heatsink and on the opposite side with an integrated circuit being temperature controlled. In this embodiment, the integrated circuit includes an AWG demultiplexer defined in a silicon-on-insulator (SOI) chip, and the TEC is thermally coupled to the (SOI) chip via a ceramic support on which the SOI chip is mounted. However, it will be appreciated, for example, that the TEC could also be directly attached to the silicon substrate of the SOI chip.

The TEC 10 is driven and controlled by associated control circuitry 14. The control circuitry 14 includes a microprocessor 15 that accepts an output from an analog to digital converter (ADC) 16, which is described below. The microprocessor 15 implements a proportional integral differential (PID) loop in software. PID control theory is well known to those skilled in the art, and so the operation of the microprocessor in this regard will not be further described.

The microprocessor has two outputs: a pulse width modulated (PWM) output and a shutdown signal. The PWM output is fed to a PWM TEC driver 17. In a typical application, this is simply an amplifier that increases the current and/or voltage that can be supplied to the TEC. The PWM TEC driver 17 is connected, via a filter 18 to the electrical terminals of the TEC, thereby enabling the PWM TEC driver to supply a voltage across the TEC 10. The filter 18 is designed to prevent excessive ripple current from reaching the TEC element, since ripple current may damage some TEC elements and/or significantly reduce the efficiency of the TEC. The particular filter shown allows the TEC to be driven in either direction. The shutdown signal, when

asserted, shuts down the PWM TEC driver such that its outputs do not drive the TEC.

The electrical terminals of the TEC are also connected to the inputs of a Seebeck amplifier 19, which is differential in operation. The output of the Seebeck amplifier 19 is connected to the ADC 16, where the value of the output voltage is converted into a numerical value for use by the microprocessor 15.

A resistive temperature sensor 13 is disposed adjacent the circuitry (not shown) whose temperature the TEC is intended to control, and its terminals are connected to the input of a temperature amplifier 20, which is also differential in operation. The output of the temperature amplifier 20 is connected to the ADC 16, where the value of the output voltage is converted into a numerical value for use by the microprocessor 15.

The microprocessor drives the TEC on the basis of the temperature sensor signal and the measured Seebeck voltage. The Seebeck voltage is compared to a predetermined"maximum Seebeck voltage limit"value, as stored internally in the microprocessor memory, and the microprocessor adjusts the Tec drive such that the temperature sensor (13) achieves the target value, but only if the Seebeck voltage lies below the Seebeck voltage limit value. In this way, the target operating temperature can be achieved whilst avoiding damage to the TEC resulting from an excessive internal temperature differential.

To achieve this, the microprocessor 15 periodically asserts the shutdown signal to the PWM TEC driver 17, which causes the PWM TEC driver to effectively be disconnected from the filter 18 and TEC 10. At this point, the potential difference across the TEC will reflect the temperature differential within the TEC. The Seebeck amplifier 19 amplifies this voltage signal and ADC 16 carries out a direct 1: 1 digitisation of the voltage signal. The microprocessor 15 determines from the value output by the ADC 19 whether

the temperature differential within the TEC exceeds a critical amount, and if so, continues to assert the shutdown signal to prevent the TEC PWM driver 17 from attempting to drive the TEC 10 any further. If the temperature differential is within an acceptable range, then the microprocessor de-asserts the shutdown signal, and the TEC is again driven according to the temperature measured by the resistive temperature sensor 13. The procedure is repeated periodically at regular intervals.

It will be appreciated that the resistive temperature sensor 13 is a preferred rather than essential element of the embodiment. In other embodiments, it is adequate to use the temperature differential detected by the Seebeck amplifier 19 to determine the necessary duty cycle of the signal driving the TEC 10. This can be done simply based on the temperature differential each time it is determined, or can be based on some combination of proportional, integral and differential assessments made using previously determined temperature differentials.

Turning to Figure 2, there is shown a more specific embodiment directed to an integrated TEC controller 200 for use with a TEC, showing an example of actual switching mechanisms for carrying out an embodiment of the technique of the present invention. The switches that allow this are controlled via Protection Logic 201.

Switches SW1 to SW4 are conventional field effect transistor (FET) drivers that can provide bi-polar current drive to the TEC 10. Switches SW1 to SW4 can either be internal or external to the controller 200, external drivers typically being used where higher power TEC drive is required. The operation of switches SW1 to SW4 is controlled by a Gate Drive module 202, which accepts control signals from the Protection Logic 201, as described in detail below.

TEC terminals 203 and 204 of the TEC controller 200 connect the TEC 10 to the controller via high pass filter circuits 205. The TEC terminal 203 is

connected to the junction of SW1 and SW2, and the TEC terminal 203 is connected to the junction of SW3 and SW4. The sides of switches SW1 and SW3 that are not connected to SW2 and SW4 respectively are connected to a TEC power supply that provides current to drive the TEC 10. The sides of SW2 and SW4 not connected to SW1 and SW3 respectively are connected to ground.

The junction between SW1 and SW2 is also connected to a switch SW5, and the junction between SW3 and SW4 is connected to a switch SW6. The respective other sides of SW5 and SW6 are connected together and connected to the non-inverting input of a differential amplifier U1A. The inverting input of U1A is connected to ground via an internal resistor, whilst its output is connected to another external pin 207. A resistor R4 is connected across terminals 206 and 207 to set the gain of U1A. U1A is thus configured as a non-inverting amplifier whose gain is set externally by R4, thus allowing differing sizes (i. e. number of elements) of the TEC to be accommodated.

The output of U1A is also connected to the inverting input of another amplifier U2A (adjustable comparator), the output of which is connected to the Protection Logic 201 and an external pin 208. The non-inverting input of U2A is connected to an external pin 209, and to an internal reference voltage via a resistor 210. An external network is connected between the pins 208 and 209. In the network, R2 is connected to ground and forms a voltage divider with resistor 210 to set a threshold voltage at the non-inverting input of U2A.

As described in more detail below, the threshold voltage determines the point at which an over-temperature condition will be detected. R3 and C1 are connected in parallel across the terminals 208 and 209, and their values are selected to set the hysteresis of the system, as described in more detail below.

The output of U2A is also fed via a buffer U3A to an external pin 211 to provide a digital status indication that the programmed, allowable maximum Seebeck voltage has been exceeded. Similarly, a sample and hold circuit

U4A is connected to the output of U1A to provide an output on a terminal 212 indicative of the Seebeck voltage being detected.

The Protection Logic also accepts signals from, for example, a Switch Overcurrent (OC) Detect 213, which determines whether any of the switches are receiving too much current. A standard thermal protection block 214 protects the TEC controller die from a thermal overload condition. In the even of thermal overload, the Protection Logic block 201 will disable the TEC drive.

Thermal overload (of the integrated circuit) is indicated by a change in logic state at terminal 215.

In use, switches SW1 and SW4 are initially closed. In this configuration, current flows from the TEC power supply, through SW1, terminal 203, the TEC 10, terminal 204 and then to ground via SW4. The current flow causes the TEC 10 to operate in a cooling mode, in which heat is pumped via the Peltier effect from a side of the TEC 10 adjacent an area being cooled to the opposite side of the TEC 10, which will usually be connected to a heatsink for heat dispersion. Alternatively, current flow can be reversed by opening switches SW1 and SW4, and closing switches SW2 and SW3. In this mode, the TEC 10 is in heating mode, due to the reversal of the heat transfer due to the Peltier effect. Maintaining all switches open prevents any current from flowing through the TEC 10, so the Peltier effect is not present and heat will be transferred between the TEC and the adjacent integrated optic circuitry due to simple convective or radiant heat transfer.

The switches SW1 to SW4 are controlled by a conventional pulse width modulation (PWM) scheme, in which positive cycles applied to SW1 and SW4 cause heating and positive cycles applied to SW2 and SW3 cause cooling. In the embodiment shown, the PWM scheme operates at 500kHz, but this can be altered for other applications and circuits. Periodically (say every 50,000 cycles, or 1/10th of a second), the operation of the switches to place the TEC 10 in cooling or heating mode at a given duty cycle is suspended, and the TEC controller 200 placed into Seebeck detection mode. In the event the

switches SW1 and SW4 are being modulated (ie, in cooling mode), this is achieved by opening SW1, holding SW4 closed, and closing SW5. The Seebeck voltage generated by the TEC is then delivered as a ground referenced signal to the non-inverting input of amplifier U1A.

In the event that SW2 and SW3 were being controlled to drive the TEC (ie, the current is reversed), then to obtain the Seebeck voltage of the TEC, SW3 is held open, and SW2 and SW6 are closed. This, again, has the effect of delivering the Seebeck voltage as a ground referenced signal to the inverting input of U1A.

The Seebeck voltage is amplified by U1A, the gain being set by R4. It will be appreciated that the controller 200 is a generalised integrated circuit for use with a number of different TECs, so R4 is an external resistor. Changing R4 allows different gains to be set to suit the TEC in use. Alternatively, R4 can be an internal resistive element, which can be fixed or variable.

The amplified Seebeck voltage is supplied from U1A to the inverting input of U2A. U2A is configured to act a comparator, comparing the voltage supplied by U1A with the reference voltage supplied to the non-inverting input by way of the voltage divider comprising resistors 209 and R2. The output of U2A is fed to the Protection Logic, which ascertains whether the differential temperature between the hot and cold sides of the TEC has exceeded the threshold set by resistor R2.

In the event that the predetermined differential temperature has been exceeded, the Protection Logic prevents further current being passed through the TEC. When the Protection Logic has detected that the predetermined temperature differential has been exceeded, it can continue sampling the Seebeck voltage at whatever rate it was previously sampling. In alternative embodiments, it can increase this sampling rate once the temperature threshold had been exceeded, or even monitor the temperature differential continuously.

R3 and C1 form a feedback circuit with a time constant selected to provide a predetermined amount of hysteresis, which prevents the TEC being fed current until the temperature differential has fallen below a predetermined amount. This takes into account thermal inertia in the system and prevents a potentially unstable positive feedback situation arising.

U3A provides a buffered output of the comparator U2A, in the form of a logic high or low signal that can be monitored externally.

Turning to Figures 3 and 4, there is shown a simulation of a TEC. V1 is a 500kHz square wave of 50% duty cycle and V2 is at a constant 5Volts. MI and M2 are power MOSFET switches and L1, L2, C1, C2 and C3 are the filter components. VTEC+ and VTEC-are the voltages appearing across the TEC, as seen on the simulation trace. The TEC model is simulated by R1, R2, C4 and V4. The current flowing through the TEC is about one amp, which represents a typical condition for this application.

U1 along with R3, R4 and R7 form a differential amplifier to amplify the Seebeck voltage. V4 is the supply for U1. VMEASURE is the output Seebeck Voltage also shown on the simulation trace.

In the first 240 microseconds of this simulation, V1 is a 500kHz square wave of 50% duty cycle and V2 is at a constant 5 volts which, in this case, results in a voltage of 2.2 volts, with 0.2 volts ripple, appearing at VTEC+ and VTEC-as seen on the simulation trace.

At 240 microseconds, V1 goes to 5 volts and M2 is turned off representing a SHUTDOWN condition. The voltages at TEC+ and TEC-are now the Seebeck voltage and VMEASURE is the output of the differential amplifier U1.

As can be seen on the simulation trace, the output voltage, VMEASURE, becomes stable at about 0. 5Volts in less than 100 microseconds.

The simulation demonstrates that the Seebeck voltage can be measured with minimum interruption to temperature control, since the Seebeck measurement only takes place less than 0.1 % of the time.

A specific example of the Seebeck effect as applied to the embodiment of Figure 5 will now be described, for the purpose of demonstrating the types of voltage values generated based on various temperature differences. The Seebeck effect refers to an open circuit potential AV that is generated when two conductors are joined at two points and a temperature difference AT is maintained between them. the differential Seebeck coefficient (in units of volts/Kelvin) is defined as: aab = lim#T # 0 #V AT In the simple model shown in Figure 5, two materials (material a and material b) with two junctions (junction 1 and junction 2) have a relative temperature difference AT. The internal resistance R is the total series resistance of the two parts and Ro is the external load resistance.

The device can be represented by a voltage : OCabAl.

A current therefore flows when Ro is connected: <BR> <BR> <BR> <BR> OCabT<BR> <BR> <BR> (R+Ro) Therefore, the Power dissipated in the external load Ro is: <BR> <BR> <BR> <BR> p (OfabT)<BR> <BR> <BR> <BR> (R+Ro)

In this application, we can say that the output current is negligible if the input of impedance of the operational amplifier is sufficiently high (say-10k). I is therefore zero and the expression becomes: V = 2Nα#T Where: N = the number of thermocouples, AT = differential temperature = TH-Tc (Kelvin) α = (a0 + a1Tave + a2Tave2) x 10-9 volts/Kelvin) ao = 22224.0 ai = 930.6 a2 =-0.9905 Typical material parameters (@ T = 296 K) Tave = 1/2 (TH + TC)(Kelvin) So, for AT = 45K : N =30 (22224 + 293604-98595) x 10-9 = 217233 x 10-9 TaVe = 1/2 (293+338) = 315. 5 Therefore V = 0.586 Volts when AT = 45K For AT = 5K N =30 a = (22224 + 274992-86490) x 10-9 =210726x10-9 Tave = ½ (293+298) = 295. 5 Therefore, V = 0.063 Volts when, AT = 5K For the case AT = 150K.

N =30 a = (22224 + 342460-134137) x 10-9 = 210726 x 10-9 Tave = ½ (293+443) = 368 Therefore, V = 2.075 Volts when AT = 150K.

Although the invention has been described with reference to a number of specific embodiments, it will be appreciated by those skilled in the art that the invention can be embodied in many other forms.