Title:
THIN FILM TRANSISTOR DEVICE AND METHOD FOR MANUFACTURING THIN FILM TRANSISTOR DEVICE
Document Type and Number:
WIPO Patent Application WO/2011/141948
Kind Code:
A1
Abstract:
Disclosed is a thin film transistor device wherein variance of current characteristics is reduced.
The thin film transistor device (10) is provided with: a substrate (1); a channel layer (2) composed of a crystallized silicon layer formed above the substrate; contact layers (3), which are impurity-doped amorphous silicon layers covering both the end portions of the channel layer; a source electrode (4) and a drain electrode (5), which are formed on the upper surfaces of the contact layers; a gate insulating film (6), which is formed on the source electrode, the drain electrode, and the channel layer not covered with the contact layers; and a gate electrode (7), which is formed on the gate insulating film. The contact layers (3) are formed above the substrate by covering the upper surface and the side surface of each of both the end portions of the channel layer, and the side surfaces of both the end portions of the channel layer (2) are electrically connected respectively to the source electrode and the drain electrode with the contact layers therebetween.
Inventors:
KAWASHIMA TAKAHIRO
HOTTA SADAYOSHI
HOTTA SADAYOSHI
Application Number:
PCT/JP2010/003156
Publication Date:
November 17, 2011
Filing Date:
May 10, 2010
Export Citation:
Assignee:
PANASONIC CORP (JP)
KAWASHIMA TAKAHIRO
HOTTA SADAYOSHI
KAWASHIMA TAKAHIRO
HOTTA SADAYOSHI
International Classes:
H01L29/786; H01L21/336
Foreign References:
| JPS6410222A | 1989-01-13 | |||
| JP2005057056A | 2005-03-03 | |||
| JPH03222370A | 1991-10-01 | |||
| JPH01309378A | 1989-12-13 | |||
| JPH05315361A | 1993-11-26 | |||
| JPH06342909A | 1994-12-13 | |||
| JPS6347980A | 1988-02-29 |
Attorney, Agent or Firm:
NII, Hiromori (JP)
New house extensive 守 (JP)
New house extensive 守 (JP)
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Claims: