Title:
TRANSIENT VOLTAGE ABSORBING CIRCUIT
Document Type and Number:
WIPO Patent Application WO/2022/196642
Kind Code:
A1
Abstract:
A transient voltage absorbing circuit (101) comprises impedance elements (Z1, Z2) connected in series to a signal line (SL), and a transient voltage absorbing element (11) connected as a shunt between the signal line (SL) and a reference potential. The transient voltage absorbing element (11) has a floating capacitance component across terminals. The impedance of the impedance elements (Z1, Z2) and the floating capacitance component of the transient voltage absorbing element (11) have values such that a low-pass filter composed of the impedance elements (Z1, Z2) and the transient voltage absorbing element (11) exhibits a Butterworth characteristic.
Inventors:
ANDO SHOTA (JP)
Application Number:
PCT/JP2022/011359
Publication Date:
September 22, 2022
Filing Date:
March 14, 2022
Export Citation:
Assignee:
MURATA MANUFACTURING CO (JP)
International Classes:
H01L27/04; H02H9/04; H03H7/01
Domestic Patent References:
WO2018025695A1 | 2018-02-08 |
Foreign References:
JP2005217043A | 2005-08-11 | |||
JP2012156847A | 2012-08-16 | |||
JP2008141716A | 2008-06-19 | |||
JPH04155614A | 1992-05-28 | |||
JPS6033727A | 1985-02-21 | |||
JP2013074496A | 2013-04-22 | |||
JP2005198167A | 2005-07-21 | |||
JP2004349740A | 2004-12-09 | |||
JP2006320023A | 2006-11-24 |
Attorney, Agent or Firm:
KAEDE PATENT ATTORNEYS' OFFICE (JP)
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