Title:
VIRTUAL MACHINE SYSTEM AND DEADLOCK RELEASE METHOD
Document Type and Number:
WIPO Patent Application WO/2010/038280
Kind Code:
A1
Abstract:
A hypervisor (1) judges that the same instruction address is continued for each of two CPUs of a guest OS (2) for a predetermined period of time. If judging that the same instruction address has been continued for each of the two CPUs for the predetermined period of time, the hypervisor (1) estimates the occurrence of a deadlock in the guest OS (2). If estimating that the deadlock has occurred in the guest OS (2), the hypervisor (1) executes an instruction of the guest OS (2) step by step for each of the CPUs to confirm that the deadlock has occurred therein. Further, the hypervisor (1) identifies the program which has caused the deadlock and instructs to abort the identified program to a management OS (3), thereby releasing the deadlock therein.
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Inventors:
SHIMOGAWA KENICHIROU (JP)
Application Number:
PCT/JP2008/067796
Publication Date:
April 08, 2010
Filing Date:
October 01, 2008
Export Citation:
Assignee:
FUJITSU LTD (JP)
SHIMOGAWA KENICHIROU (JP)
SHIMOGAWA KENICHIROU (JP)
International Classes:
G06F9/52; G06F9/46
Foreign References:
| JPH06337798A | 1994-12-06 | |||
| JP2000222228A | 2000-08-11 | |||
| JP2003030166A | 2003-01-31 |
Attorney, Agent or Firm:
WATANABE, AKIHIKO (JP)
Akihiko Watabe (JP)
Akihiko Watabe (JP)
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