Title:
WIRING SUBSTRATE, ELECTRONIC DEVICE, AND NOISE SHIELDING METHOD
Document Type and Number:
WIPO Patent Application WO/2011/111314
Kind Code:
A1
Abstract:
A wiring substrate (100) is provided with: power supply planes (141, 143) which are arranged in a D layer (140) on either side of a gap (147); connection members (182, 183, 184) which electrically connect at least one of the power supply planes (141, 143) and an electronic element (181); a plurality of conductor elements (121) which, by being arranged in a repeating fashion, surround a first region, which includes the connection members (182, 183, 184) and at least part of the gap (147); and ground planes (111, 171) which are arranged in an A layer (110) or a G layer (170), and which extend into a third region or a second region containing a region which faces the first region, and a region which faces the conductor elements (121).
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Inventors:
TOYAO HIROSHI (JP)
KUSUMOTO MANABU (JP)
KOBAYASHI NAOKI (JP)
ANDO NORIAKI (JP)
KUSUMOTO MANABU (JP)
KOBAYASHI NAOKI (JP)
ANDO NORIAKI (JP)
Application Number:
PCT/JP2011/000911
Publication Date:
September 15, 2011
Filing Date:
February 18, 2011
Export Citation:
Assignee:
NEC CORP (JP)
TOYAO HIROSHI (JP)
KUSUMOTO MANABU (JP)
KOBAYASHI NAOKI (JP)
ANDO NORIAKI (JP)
TOYAO HIROSHI (JP)
KUSUMOTO MANABU (JP)
KOBAYASHI NAOKI (JP)
ANDO NORIAKI (JP)
International Classes:
H05K1/02; H05K3/46
Foreign References:
JP2009111132A | 2009-05-21 | |||
JP2007088102A | 2007-04-05 | |||
JPH08148800A | 1996-06-07 | |||
JP2009032907A | 2009-02-12 |
Attorney, Agent or Firm:
HAYAMI, SHINJI (JP)
Shinji Hayami (JP)
Shinji Hayami (JP)
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Claims:
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