Title:
【発明の名称】プログラマブル命令トラップシステム及び方法
Document Type and Number:
Japanese Patent JP2000504444
Kind Code:
A
Abstract:
A system and method providing a programmable hardware device within a CPU. The programmable hardware device permits a plurality of instructions to be trapped before they are executed. The instructions that are to be trapped are programmable to provide flexibility during CPU debugging and to ensure that a variety of application programs can be properly executed by the CPU. The system must also provide a means for permitting a trapped instruction to be emulated and/or to be executed serially. Related Applications
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Inventors:
Subcar, Sunil
Shen, Gene
Fernad, Saddadian
Shevanau, Mike
Shen, Gene
Fernad, Saddadian
Shevanau, Mike
Application Number:
JP53674596A
Publication Date:
April 11, 2000
Filing Date:
May 31, 1996
Export Citation:
Assignee:
富士通株式会社
International Classes:
G06F9/38; G06F9/30; G06F11/28; G06F11/36; (IPC1-7): G06F9/38; G06F9/30; G06F9/38; G06F11/28
Attorney, Agent or Firm:
Takashi Ishida (3 others)