Title:
【発明の名称】低欠陥密度の自己格子間物優勢シリコン
Document Type and Number:
Japanese Patent JP2001500468
Kind Code:
A
Abstract:
The present invention relates to a process for the preparation of single crystal silicon, in ingot or wafer form, which contains an axially symmetric region in which vacancies are the predominant intrinsic point defect and which is substantially free of agglomerated vacancy intrinsic point defects.
Inventors:
Farstel, Robert
Mark Graph, Steve A
McAid, Themes A
Holzer, joseph sea
Mutti, Paolo
Johnson, Bayard Kay
Mark Graph, Steve A
McAid, Themes A
Holzer, joseph sea
Mutti, Paolo
Johnson, Bayard Kay
Application Number:
JP54318998A
Publication Date:
January 16, 2001
Filing Date:
April 09, 1998
Export Citation:
Assignee:
MEMC ELECTRONIC MATERIALS,INCORPORATED
International Classes:
C30B15/00; C30B15/14; C30B29/06; C30B15/20; C30B15/22; C30B21/06; C30B27/02; C30B28/10; C30B30/04; C30B33/00; H01L21/322; H01L21/324; (IPC1-7): C30B29/06; C30B15/20
Attorney, Agent or Firm:
Aoyama Ryo (1 person outside)