Title:
【発明の名称】直交周波数分割多重を使用するデジタル受信機のシングルチップVLSI実施
Document Type and Number:
Japanese Patent JP2001527706
Kind Code:
A
Abstract:
The invention provides a single chip implementation of a digital receiver for multicarrier signals that are transmitted by orthogonal frequency division multiplexing. Improved channel estimation and correction circuitry are provided. The receiver has highly accurate sampling rate control and frequecy control circuitry. BCH decoding of tps data carriers is achieved with minimal resources with an arrangement that includes a small Galois field multiplier. An improved FFT window synchronization circuit is coupled to the resampling circuit for locating the boundary of the guard interval transmitted with the active frame of the signal. A real-time pipelined FFT processor is operationally associated with the FFT window synchronization circuit and operates with reduced memory requirements.
Inventors:
Alam, Duwood
Collins, Masseu, James
Davis, david, haugh
Keyville, Peter, Anthony
Nolan, Joan, Masseu
Foxcroft, thomas
Hoodie, jonathan
Collins, Masseu, James
Davis, david, haugh
Keyville, Peter, Anthony
Nolan, Joan, Masseu
Foxcroft, thomas
Hoodie, jonathan
Application Number:
JP52054998A
Publication Date:
December 25, 2001
Filing Date:
October 22, 1997
Export Citation:
Assignee:
Disco Vision Associates
International Classes:
G06F17/14; H04L1/00; H04L25/02; H04J11/00; H04L27/26; (IPC1-7): H04J11/00; G06F17/14; H04L1/00
Attorney, Agent or Firm:
Fujihiko Motohiko