Title:
【発明の名称】減じられた固定パターン雑音を有するCMOS画像センサ及び利得訂正
Document Type and Number:
Japanese Patent JP2002507346
Kind Code:
A
Abstract:
A correlated double-sampling circuit for sampling an input signal received from a pixel sensor circuit via an input line. According to one embodiment, a first switch selectively couples a junction of first terminals of a first capacitor and a second capacitor to the input line. A second switch selectively couples an output node coupled to a second terminal of the second capacitor to a reference voltage. A third switch selectively couples the output node to an output line.
Inventors:
Sauer, Donald, John
Application Number:
JP50265699A
Publication Date:
March 05, 2002
Filing Date:
June 02, 1998
Export Citation:
Assignee:
Sarnoff Corporation
International Classes:
H04N5/357; H04N5/363; H04N5/365; H04N5/374; (IPC1-7): H04N5/335
Attorney, Agent or Firm:
Yuichi Yamada (1 person outside)