Title:
【発明の名称】循環アドレスレジスタ
Document Type and Number:
Japanese Patent JP2003517676
Kind Code:
A
Abstract:
A device and corresponding programming instructions are provided that facilitate a circular addressing process. The device is configured to provide an address output that is constrained to lie within specified bounds. When a "circular increment" or "circular decrement" instruction is executed that would cause the address to exceed a bound, the address is reset to the other bound. In a preferred embodiment, the programming instruction also sets condition flags that indicate when the address is at each bound. By providing these "bounds" flags in conjunction with the circular addressing operation, multiple-word data items can be processed efficiently. A base-address of N contiguous words in a memory is loaded into the circular register, and a circular addressing instruction is used to access each word of the N contiguous words in sequence; a bounds flag is set when the last word of the multi-word data item is accessed.
Inventors:
Ostler Farrell El
Dacher Antony F
Dacher Antony F
Application Number:
JP2001545947A
Publication Date:
May 27, 2003
Filing Date:
December 05, 2000
Export Citation:
Assignee:
Konin Krekka Philips Electronics NV
International Classes:
G06F9/30; G06F7/50; G06F7/505; G06F9/32; G06F9/355; G06F9/38; G06F12/02; (IPC1-7): G06F9/30; G06F9/32; G06F12/02
Attorney, Agent or Firm:
Susumu Tsugaru (1 person outside)