Title:
集積化電子切断回路、方法およびシステム
Document Type and Number:
Japanese Patent JP2007503108
Kind Code:
A
Abstract:
Merged devices for transient blocking. A pass transistor is placed so that its body potential drives the gate of a depletion-mode JFET-type blocking transistor. Thus a transient which appears on an external terminal is very rapidly propagated to shut off the blocking transistor, before large numbers of carriers can be injected. Preferably a shunt device is also used to drop high potentials which may appear at the same time. This connection can be particularly useful in power or data input terminals.
Inventors:
Harris Richard Allen
Rheinwi Handco
Rheinwi Handco
Application Number:
JP2006523488A
Publication Date:
February 15, 2007
Filing Date:
August 20, 2004
Export Citation:
Assignee:
Full Tech Proprietary Limited
International Classes:
H01L21/8234; H01L21/337; H01L21/822; H01L21/8232; H01L27/04; H01L27/06; H01L27/088; H01L27/098; H01L29/06; H01L29/10; H01L29/78; H01L29/80; H01L29/808; H02H9/04; H01L29/08
Domestic Patent References:
| JPH0353613A | 1991-03-07 | |||
| JPH0365020A | 1991-03-20 | |||
| JPH04211131A | 1992-08-03 | |||
| JP2002016485A | 2002-01-18 | |||
| JP2002176347A | 2002-06-21 | |||
| JPH08512191A | 1996-12-17 |
Foreign References:
| WO2003069753A1 | 2003-08-21 |
Attorney, Agent or Firm:
Shinsuke Nakajima