Title:
低コストウェファボックスの改良
Document Type and Number:
Japanese Patent JP2007505798
Kind Code:
A
Abstract:
The wafer box includes a tray (10) and a cover (62) . The tray (10) includes an inner (34, 36, 38, 40) and outer (24, 26, 28, 30) wall configuration with horizontal semicircular channels (48, 50, 52, 54) therebetween to perform spacing, strengthening and horizontal shock-absorbing functions. The tray (10) further includes a wafer cavity (42) formed within the inner wall (34, 36, 38, 40) . The wafer cavity (42) includes a lattice (46) of ridges on the floor thereof to provide a vertical shock absorbing function. The wall (76, 78, 80, 82) of the cover (62) engages and mates to the outer wall (24, 26, 28, 30) of the tray (10) thereby forming a double wall configuration. A pedestal configuration (90, 92) is formed on the comers and mid-spans of the top of the cover (62) to provide standoff clearance between the inter-stacked boxes to minimize or eliminate the transmission of shock and vibration through an inter-stack configuration.
Inventors:
Forsyth, Barolis El.
Application Number:
JP2006537959A
Publication Date:
March 15, 2007
Filing Date:
May 18, 2004
Export Citation:
Assignee:
Illinois Tours Works Inc.
International Classes:
B65D85/86; B65D1/42; B65D21/02; B65D43/02; B65D81/02; B65D85/30; H01L21/673
Attorney, Agent or Firm:
Atsushi Aoki
Jun Tsuruta
Tetsuro Shimada
Shinozaki Masami
Jun Tsuruta
Tetsuro Shimada
Shinozaki Masami