Title:
組込方法及びこの方法により製造されたアセンブリ
Document Type and Number:
Japanese Patent JP2007537588
Kind Code:
A
Abstract:
An assembly (100) is provided comprising a first chip (20) and a second chip (30) which are interconnected through solder connections. These comprise, at the first chip, an underbump metallization and a solder bump, and, at the second chip, a metallization. In this case the solder bump is provided as a fluid layer with a contact angle of less than 90° C., and an intermetallic compound is formed on the basis of the metallization at the second chip, and at least one element of the composition is applied as the solder bump.
Inventors:
Nicolas, Yeah, A. Fan, Fern
Hendrik, P. Hofstenbach
Hendrik, P. Hofstenbach
Application Number:
JP2007512626A
Publication Date:
December 20, 2007
Filing Date:
April 28, 2005
Export Citation:
Assignee:
Koninklijke Philips Electronics N.V.
International Classes:
H01L25/065; B23K1/00; B23K35/26; B23K35/30; C22C5/02; C22C13/00; H01L21/60; H01L23/12; H01L25/07; H01L25/18; B23K101/40
Domestic Patent References:
| JP2002043352A | 2002-02-08 | |||
| JP2002170918A | 2002-06-14 | |||
| JPS6354738A | 1988-03-09 | |||
| JP2002124533A | 2002-04-26 |
Attorney, Agent or Firm:
Kenji Yoshitake
Hidetoshi Tachibana
Yasukazu Sato
Hiroshi Yoshimoto
Yasushi Kawasaki
Hidetoshi Tachibana
Yasukazu Sato
Hiroshi Yoshimoto
Yasushi Kawasaki