Title:
SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JP2019050402
Kind Code:
A
Abstract:
To provide a semiconductor device reducing power consumption and delay in operation in a semiconductor integrated circuit.SOLUTION: In each of a plurality of sequential circuits 21_x which a storage circuit 11 has, there are provided: a transistor 31 whose channel formation region is composed of an oxide semiconductor; and a capacitive element 32 where a node to which one of electrodes is electrically connected by the transistor being in an off-state is in a floating state. By the channel formation region of the transistor being composed of the oxide semiconductor, it is possible to provide a transistor of extremely low off-current (leakage current). Thus, by putting the transistor into the off-state in a period when no source voltage is supplied to the storage circuit, it is possible to keep potential of the node to which one of the electrodes of the capacitive element during the period is electrically connected, constant or nearly constant.SELECTED DRAWING: Figure 1
Inventors:
KOYAMA JUN
Application Number:
JP2018208578A
Publication Date:
March 28, 2019
Filing Date:
November 06, 2018
Export Citation:
Assignee:
SEMICONDUCTOR ENERGY LAB CO LTD
International Classes:
H01L29/786; H01L21/8234; H01L27/088; H03K3/356
Domestic Patent References:
| JP2002304889A | 2002-10-18 | |||
| JP2010062549A | 2010-03-18 | |||
| JPS5444842A | 1979-04-09 | |||
| JPH05110392A | 1993-04-30 | |||
| JP2005222677A | 2005-08-18 | |||
| JP2003203475A | 2003-07-18 | |||
| JPS61113189A | 1986-05-31 | |||
| JPH05242667A | 1993-09-21 |