Title:
SEMICONDUCTOR DEVICE AND PROCESSOR CONTROL METHOD
Document Type and Number:
Japanese Patent JP2019192110
Kind Code:
A
Abstract:
To provide a semiconductor device capable of reducing power consumption.SOLUTION: A semiconductor device having a processor executing a plurality tasks in synchronization with a supplied operation clock signal while switching tasks comprises a processor use rate measuring circuit for measuring a use rate of the processor in a first period, and a frequency division value selecting circuit and a frequency divider circuit for changing frequency of the operation clock signal supplied to the processor in a second period after the first period in terms of time on the basis of the use rate measured by the processor use rate measuring circuit.SELECTED DRAWING: Figure 1
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Inventors:
SHIMIZU MASAYUKI
Application Number:
JP2018086891A
Publication Date:
October 31, 2019
Filing Date:
April 27, 2018
Export Citation:
Assignee:
RENESAS ELECTRONICS CORP
International Classes:
G06F1/32; G06F1/08
Attorney, Agent or Firm:
Tsutsui International Patent Office