Title:
DISPLAY DEVICE
Document Type and Number:
Japanese Patent JP2021103784
Kind Code:
A
Abstract:
To provide a thin film transistor having respective small contact resistances between a semiconductor layer including a region where a thin film transistor channel is formed, and respective ones of a source electrode layer, and a drain electrode layer; to provide a thin film transistor having low electrical resistance of wiring; and provide a thin film transistor having a structure in which carriers can move smoothly in a semiconductor layer covering at least a part of a step generated at end portions of a source electrode layer and a drain electrode layer.SOLUTION: When a thin film transistor is formed, a first wiring layer is provided on a first electrode layer, a second wiring layer is provided on a second electrode layer, and the first electrode layer extends from an end of the first wiring layer, the second electrode layer extends from an end of the second wiring layer, and a semiconductor layer is electrically connected to a side surface and an upper surface of the first electrode layer and a side surface and an upper surface of the second electrode layer.SELECTED DRAWING: Figure 1
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Inventors:
AKIMOTO KENGO
TSUBUKI MASASHI
TSUBUKI MASASHI
Application Number:
JP2021044266A
Publication Date:
July 15, 2021
Filing Date:
March 18, 2021
Export Citation:
Assignee:
SEMICONDUCTOR ENERGY LAB CO LTD
International Classes:
H01L29/786; G02F1/1368; H01L21/28; H01L21/336; H01L21/8236; H01L27/088; H01L27/32; H01L29/41; H01L29/417; H01L51/50; H05B33/02; H05B33/10; H05B33/14
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Foreign References:
| US5995177A | 1999-11-30 | |||
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