Title:
【発明の名称】半導体記憶装置
Document Type and Number:
Japanese Patent JP2608881
Kind Code:
B2
Abstract:
PURPOSE:To specify the stored level per element exceeding multiple bits by a method wherein any data is converted into fluctuation level of threshold value voltage of MOSFET to be stored. CONSTITUTION:A drain terminal 14 of a floating gate type MOSFET 10 is impressed with a hot electron injectable voltage through the intermediary of a current-voltage converter 11 while this drain voltage is compared with a specific voltage by an operational amplifier 12 so that a gate terminal 15 is impressed with a gate voltage to flow specific drain current specified by an input voltage of a drain current control terminal 17. In such a state, within the floating gate of FET 10, the drain current flowing in channel is accelerated in a high electrolytic region near a drain junction becoming hot electrons to be injected into a gate oxide film while I/V characteristics of FET 10 is parallel- shifted in the gate voltage axial direction to change a threshold value voltage. When the gate voltage impressed on the terminal 15 controlled by the amplifier 12 to flow specific drain current constantly is monitored through the intermediary of a comparator 13 to inject hot electrons, specific threshold value is processed to store multiple bits per element as a fluctuation level of threshold value voltage.
Inventors:
Yoshiro Nakata
Application Number:
JP13652586A
Publication Date:
May 14, 1997
Filing Date:
June 12, 1986
Export Citation:
Assignee:
Matsushita Electric Industrial Co., Ltd
International Classes:
H01L27/112; G11C11/34; G11C11/56; H01L21/8246; H01L27/10; (IPC1-7): H01L21/8246; G11C11/34; H01L27/112
Domestic Patent References:
| JPS53148395A | ||||
| JPS5421984A | ||||
| JPS5727559A |
Attorney, Agent or Firm:
Tomoyuki Takimoto (1 person outside)