Title:
【発明の名称】不揮発性半導体メモリ
Document Type and Number:
Japanese Patent JP2671263
Kind Code:
B2
Abstract:
PURPOSE:To reduce a breakdown voltage and to supply a sufficient memory cell current, and to satisfy data reading speed and writing characteristic by setting the impurity concentration of the partial region of a channel region to a higher value than that of other region. CONSTITUTION:When a plurality of memory cells are connected in series, a high concentration region 25 is formed in a part in contact with the field insulating film of the channel region 24 of each memory cell. In this case, the impurity density in the region 24 except the region 25 is low at the threshold voltage of each memory cell, and reduced to the degree of feeding a sufficient channel current.
Inventors:
Hiroshi Iwahashi
Application Number:
JP32568687A
Publication Date:
October 29, 1997
Filing Date:
December 23, 1987
Export Citation:
Assignee:
Toshiba Corporation
International Classes:
G11C17/00; G11C16/04; H01L21/8246; H01L21/8247; H01L27/10; H01L27/112; H01L27/115; H01L29/78; H01L29/788; H01L29/792; (IPC1-7): H01L27/115; H01L21/8247; H01L29/788; H01L29/792
Domestic Patent References:
| JP5154788A | ||||
| JP59135771A | ||||
| JP5156183A | ||||
| JP60182162A |
Attorney, Agent or Firm:
Takehiko Suzue (2 outside)