Title:
【発明の名称】半導体装置の製造方法
Document Type and Number:
Japanese Patent JP2677577
Kind Code:
B2
Abstract:
PURPOSE:To form a trench into which an impurity can be introduced easily and obtain a high performance device by a method wherein a trench is formed in a semiconductor substrate by anisotropic etching and the side walls of the trench are made to retreat by isotropic etching and, further, inclinations are formed on the side walls by anisotropic etching. CONSTITUTION:A P-type Si substrate 1 is subjected to a thermal oxidation to form an Si oxide film 2 and an Si nitride film 3 and a second Si oxide film 4 are formed on it and a resist film 6 is applied to the film 4. An aperture is formed in the film 6 and an aperture is formed in the film 4 by anisotropic reactive etching with the film 6 as a mask. After the mask 6 is removed, an aperture is formed in the films 3 and 2 by etching with the film 4 as a mask to form an etching mask 5 with an aperture 5a. Then a vertical trench is formed by anisotropic reactive etching with the mask 5. Then the whole side walls of the trench are etched isotropically by wet etching to form protruding parts 5b. After that, a trench 8 with vertical walls 8a and inclined walls 8b are formed by anisotropic reactive etching. Ions 9a reflected by the walls 8a are re- implanted into the inclined walls 8b.
Inventors:
Koichi Kato
Application Number:
JP1742988A
Publication Date:
November 17, 1997
Filing Date:
January 29, 1988
Export Citation:
Assignee:
Toshiba Corporation
International Classes:
H01L27/04; H01L21/302; H01L21/306; H01L21/3065; H01L21/822; H01L21/8242; H01L27/10; H01L27/108; (IPC1-7): H01L21/306; H01L21/3065; H01L21/822; H01L21/8242; H01L27/04; H01L27/108
Domestic Patent References:
| JP6243133A | ||||
| JP56140646A | ||||
| JP61500821A |
Attorney, Agent or Firm:
Yasuo Miyoshi (1 outside)