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Title:
【発明の名称】マイクロコンピュータのリセット回路
Document Type and Number:
Japanese Patent JP2714689
Kind Code:
B2
Abstract:
PURPOSE:To prevent the disappearance of contents stored in a RAM by using a circuit which turns off a display device to minimize the power consumption at transfer of a back-up mode, detects the OFF state of the display device via a display monitor, and prevents the generation of a reset pulse regardless of the voltage rise of a power circuit in an active state. CONSTITUTION:The output voltage of a power circuit 3 drops once and then rises up again when a power supply hits. In such a case, a microcomputer 1 keeps a normal mode if the lowest voltage level is higher than the threshold value of a holding detection terminal HOLD. The threshold value is kept at a low level in an active state of a display device 7, i.e., in a normal mode. Thus the electric charge of a capacitor 52 of a pulse generating circuit 5 flows to a display monitor terminal DSP via a forward diode 9. Then a transistor 51 is cut off and no reset pulse is produced. Furthermore the microcomputer 1 performs a back-up operation even if the voltage drop degree is less than the threshold value of the terminal HOLD. Thus the contents stored in a RAM are held there.

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Inventors:
Shinji Furuhashi
Application Number:
JP11821989A
Publication Date:
February 16, 1998
Filing Date:
May 10, 1989
Export Citation:
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Assignee:
Onkyo Co., Ltd.
International Classes:
G06F1/24; G06F15/78; (IPC1-7): G06F1/24; G06F15/78



 
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