Title:
【発明の名称】信号処理装置
Document Type and Number:
Japanese Patent JP2762612
Kind Code:
B2
Abstract:
A signal processing device including a central processing block and plural signal processing function blocks, which are mutually connected by a common address bus and a common data bus, wherein analog signal lines are provided for analog signal transmission between the central processing block and the plural signal processing function blocks and the central processing block is provided with a D/A converter and an A/D converter connected to the analog signal lines. Thus there are only required a D/A converter and an A/D converter in the central processing block, for analog signal transmission between the central processing block and each of the processing function blocks. Also the wiring can be simplified as the number of analog signal lines is limited.
Inventors:
KASHIDA MOTOICHI
YAMASHITA NOBUITSU
YAMASHITA NOBUITSU
Application Number:
JP25128889A
Publication Date:
June 04, 1998
Filing Date:
September 27, 1989
Export Citation:
Assignee:
KYANON KK
International Classes:
H04Q9/00; G06F3/05; (IPC1-7): H04Q9/00
Domestic Patent References:
| JP4910644A |
Attorney, Agent or Firm:
Tsuneo Tanaka