【発明の名称】MOSデバイス用過電圧保護回路

Title:

【発明の名称】MOSデバイス用過電圧保護回路

Document Type and Number:

Japanese Patent JP2797259

Kind Code:

B2

Abstract:

The invention relates to an overvoltage protection circuit for MOS components consisting of a resistor (R), a field oxide transistor (FOX) and a thin oxide transistor (DOX). The breakdown of the parasitic dipole transistor inside the field oxide transistor is optimised so that the latter can with certainty leak off all the energy of an overvoltage pulse against the reference potential (VSS?). The measures described reduce the thermal damage known as 'spiking' which can cause the MOS component to break down.

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Inventors:

Terretsuki, Hartmut
Richie, Rotal

Application Number:

JP50169790A

Publication Date:

September 17, 1998

Filing Date:

January 18, 1990

Export Citation:

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Assignee:

Siemens Aktiengesellschaft

International Classes:

H01L21/822; H01L21/8234; H01L27/04; H01L27/02; H01L27/088; (IPC1-7): H01L27/04; H01L21/822

Other References:

【文献】欧州公開217525(EP,A1)

Attorney, Agent or Firm:

Tomimura Kiyoshi

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