Title:
【発明の名称】TAB内蔵型半導体装置
Document Type and Number:
Japanese Patent JP2819825
Kind Code:
B2
Abstract:
PURPOSE:To contrive to deform a lead, reduce a stress, and prevent a disconnection from occurring by a method wherein a width of at least the lead at both ends of each side out of an outer lead is formed wider than that of other leads. CONSTITUTION:A width W1 of leads 4a to 4h at an end out of a lead 4i of each side of a semiconductor device 1 is formed wider than a width W of the lead 4i provided between them. As this, the width of the leads 4a to 4h at both ends of each side is formed wider than that of the lead 4i provided between them, whereby stiffness increases, and further as an area to which pressure of a tool is applied becomes larger, a compressing force increases more than the other lead 4i. Accordingly, even if mechanical, physical, and thermal stresses occur, since the leads 4a to 4h formed widely absorb them, it is not a fear that the stress of the other lead 4i is reduced and a connecting defective occurs. Thus, an attempt is made to deform the lead, reduce the stress, and prevent a disconnection from occurring.
Inventors:
Kurasawa Munenori
Application Number:
JP31758290A
Publication Date:
November 05, 1998
Filing Date:
November 21, 1990
Export Citation:
Assignee:
Seiko Epson Corporation
International Classes:
H01L21/60; H01L23/50; (IPC1-7): H01L21/60; H01L23/50
Domestic Patent References:
| JP2137345A | ||||
| JP2121343A |
Attorney, Agent or Firm:
Kisaburo Suzuki (1 outside)