Title:
【発明の名称】線形変換を利用した画像処理用並列記憶装置
Document Type and Number:
Japanese Patent JP2941192
Kind Code:
B2
Abstract:
A parallel memory device for an image processing utilizing a linear transformation, capable of achieving simultaneous access in either of various access forms which uses simple hardware and is capable of achieving a high processing rate and thereby a high circuit efficiency. The parallel memory device includes a plurality of address computation circuit units, each adapted to generate an address of each corresponding one of memory modules on the basis of an access form, reference coordinates and a memory module number of the corresponding memory module, a plurality of memory cells each adapted to receive the address generated from each corresponding one of the address computation circuit units and a read/write signal and execute storage, inputting and outputting of actual data, omega networks each adapted to receive the data from the memory cells associated therewith, to generate appropriate paths for the data such that an actual processing order of the memory modules coincides with a logical order required for a processor, and to output the data via the generated paths, and a shift circuit unit adapted to generate appropriate paths between each omega network and data terminals on the basis of an input indicative of the access form.
Inventors:
I FUN GYU
BAKU JON ON
KIMU KIRU YUN
BAKU JON ON
KIMU KIRU YUN
Application Number:
JP8977095A
Publication Date:
August 25, 1999
Filing Date:
April 14, 1995
Export Citation:
Assignee:
KORIA TEREKOMYUNIKEESHON OOSORITEI
International Classes:
G06F15/76; G06F17/16; G06T1/60; G06F12/00; G11C15/00; (IPC1-7): G06T1/60; G06F12/00
Domestic Patent References:
| JP60260086A | ||||
| JP57114182A | ||||
| JP6367655A |
Attorney, Agent or Firm:
Yoshikazu Tani (1 person outside)