Title:
【発明の名称】表示制御装置
Document Type and Number:
Japanese Patent JP2975021
Kind Code:
B2
Abstract:
PURPOSE:To make a display only memory circuit unnecessary by selecting one of plural windows according to a priority order set at every unit time in display scan, and calculating the address of the window. CONSTITUTION:Prescribed information can be generating a memory address to read out information to be displayed on the window of a display picture from the storage of a display information memory circuit 11 in real time simultaneously with the scan of a display device, and making access to the display information memory circuit 11 with a generated address. To perform such address generation at every unit time in the scan, the window to be displayed at everytime is decided, and the address of display information in the memory circuit is decided. In such a way, it is enough to prepare only one kinds of memory, and the display control of plural(multi) windows can be performed without transferring the information from the memory to another memory.
Inventors:
MASUDA NORITAKA
Application Number:
JP16454288A
Publication Date:
November 10, 1999
Filing Date:
June 30, 1988
Export Citation:
Assignee:
MITSUBISHI DENKI KK
International Classes:
G06F3/14; G06F3/048; (IPC1-7): G06F3/14
Domestic Patent References:
| JP60129789A | ||||
| JP1232419A | ||||
| JP6327954U |
Attorney, Agent or Firm:
Kenichi Hayase