Title:
【発明の名称】不揮発性半導体記憶装置
Document Type and Number:
Japanese Patent JP3070531
Kind Code:
B2
Abstract:
A nonvolatile semiconductor memory includes a memory cell constituted by at least first and second floating gates, first and second control gates, and a source and a drain. The first floating gate is formed on a semiconductor substrate through a gate insulating film. The second floating gate is formed on a region without the first floating gate via the gate insulating film. The first control gate is formed on the first floating gate via an insulating film. The second control gate is formed on the second floating gate via the insulating film. The source and the drain are formed in the semiconductor substrate to sandwich the first and second floating gates.
Inventors:
Masato Kawata
Application Number:
JP17168797A
Publication Date:
July 31, 2000
Filing Date:
June 27, 1997
Export Citation:
Assignee:
NEC
International Classes:
G11C11/56; G11C16/04; H01L21/336; H01L21/8247; H01L27/115; H01L29/788; H01L29/792; (IPC1-7): H01L21/8247; H01L27/115; H01L29/788; H01L29/792
Domestic Patent References:
| JP878545A | ||||
| JP61256673A | ||||
| JP6225459A | ||||
| JP6276563A | ||||
| JP1273358A |
Attorney, Agent or Firm:
Masaki Yamakawa