Title:
【発明の名称】受信機
Document Type and Number:
Japanese Patent JP3122102
Kind Code:
B2
Abstract:
The electronic apparatus includes at least a receiver having synthesizer section for selecting a receiving frequency and providing an information signal corresponding to the selected receiving frequency, a micro-computer operating on a clock signal (fc) for controlling the synthesizer section, and a circuit responsive to the information signal for shifting the clock frequency when the selected receiving frequency is a frequency disturbed by a higher harmonic (Sh) of the clock frequency, thereby to avoid disturbance of reception of the broadcast signal without requiring undue reduction of the clock frequency.
Inventors:
Kazuyuki Suda
Akio Araki
Toshio Asai
Akio Araki
Toshio Asai
Application Number:
JP23762489A
Publication Date:
January 09, 2001
Filing Date:
September 13, 1989
Export Citation:
Assignee:
ソニー株式会社
International Classes:
G06F1/04; H04B1/16; H04B1/10; H04B15/04; (IPC1-7): H04B1/10; H04B1/16
Domestic Patent References:
| JP57195257U | ||||
| JP57109648U |
Attorney, Agent or Firm:
Hidemori Matsukuma