Title:
【発明の名称】発振器を含む同期化回路
Document Type and Number:
Japanese Patent JP3182417
Kind Code:
B2
Abstract:
A synchronizing circuit including an oscillator (OS), a phase discriminator (PD) having a first input coupled to an input terminal of the circuit (SP) for receiving an incoming synchronizing signal, a second input for receiving a signal derived from the oscillator (OS) and an output for applying a control signal to a control input (30) of the oscillator (OS) for controlling the frequency and/or the phase of the oscillator signal. To ensure that the action of the circuit is not disturbed when no signal is present at the input terminal of the circuit, the circuit includes an auxiliary circuit for reducing the difference between the signal at the output of the phase discriminator and a reference, the auxiliary circuit (AC) being active in response to a synchronizing signal detector at the output of the phase discriminator (PD) in the absence of the incoming synchronizing signal and inactive in the opposite case.
Inventors:
Brno Pierre Jean-Marie Motte
Application Number:
JP17282290A
Publication Date:
July 03, 2001
Filing Date:
July 02, 1990
Export Citation:
Assignee:
Konin Krekka Philips Electronics NV
International Classes:
H03L7/14; H04N5/12; H04N5/05; (IPC1-7): H04N5/12; H03L7/14; H04N5/05
Domestic Patent References:
| JP58187077A | ||||
| JP62114330A |
Attorney, Agent or Firm:
Akihide Sugimura (5 outside)