Title:
【発明の名称】LDMOS型半導体装置の製造方法
Document Type and Number:
Japanese Patent JP3487844
Kind Code:
B1
Abstract:
In a method of fabricating an LDMOS semiconductor device, a combined layer including a gate oxide film and a first nitride film is formed on a substrate within a first region. A mask body is formed on the combined layer within a second region that is inside of the first region. Then, first impurities are introduced into the substrate outside of the second region using the mask body as a mask. Next, second impurities are introduced into the substrate outside of the first region using the mask body and the combined layer as a mask. Finally, the introduced first and second impurities are diffused by a heat treatment so as to form a source/drain region and a well region.
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Inventors:
Katsuhito Sasaki
Application Number:
JP2002174950A
Publication Date:
January 19, 2004
Filing Date:
June 14, 2002
Export Citation:
Assignee:
Oki Electric Industry Co., Ltd.
International Classes:
H01L21/28; H01L21/336; H01L29/423; H01L29/78; (IPC1-7): H01L29/78
Domestic Patent References:
| JP4306880A | ||||
| JP1125866A | ||||
| JP936361A | ||||
| JP7169974A | ||||
| JP1300563A | ||||
| JP54110789A | ||||
| JP5396774A |
Attorney, Agent or Firm:
Takashi Ogaki