Title:
プラズマCVD法および薄膜トランジスタの作製方法
Document Type and Number:
Japanese Patent JP3571129
Kind Code:
B2
Abstract:
In a process of forming a silicon oxide film 116 that constitutes an interlayer insulating film with TEOS as a raw material through the plasma CVD method, the RF output is oscillated at 50 W, and the RF output is gradually increased from 50 W to 250 W (an output value at the time of forming a film) after discharging (after the generation of O2-plasma). A TEOS gas is supplied to start the film formation simultaneously when the RF output becomes 250 W, or while the timing is shifted. As a result, because the RF power supply is oscillated at a low output when starting discharging, a voltage between the RF electrodes can be prevented from changing transitionally and largely.
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Inventors:
Shunpei Yamazaki
Mitsunori Sakuma
Mitsunori Sakuma
Application Number:
JP31752495A
Publication Date:
September 29, 2004
Filing Date:
November 10, 1995
Export Citation:
Assignee:
Semiconductor Energy Laboratory Co., Ltd.
International Classes:
C23C16/50; C23C16/40; H01L21/205; H01L21/285; H01L21/31; H01L21/316; H01L29/786; (IPC1-7): H01L21/31; C23C16/50; H01L21/205; H01L21/285; H01L21/316
Domestic Patent References:
| JP6084888A | ||||
| JP4123424A | ||||
| JP6318552A |
Attorney, Agent or Firm:
Shinichi Tamaki